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arm64: dts: imx8dxl: add adc0 support
Add adc0 and adc1 node at imx8 common dma subsystem. imx8dxl have only adc0. Change irq number for adc0. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -156,6 +156,34 @@ dma_subsys: bus@5a000000 {
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status = "disabled";
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};
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adc0: adc@5a880000 {
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compatible = "nxp,imx8qxp-adc";
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reg = <0x5a880000 0x10000>;
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interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&gic>;
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clocks = <&adc0_lpcg 0>,
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<&adc0_lpcg 1>;
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clock-names = "per", "ipg";
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assigned-clocks = <&clk IMX_SC_R_ADC_0 IMX_SC_PM_CLK_PER>;
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assigned-clock-rates = <24000000>;
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power-domains = <&pd IMX_SC_R_ADC_0>;
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status = "disabled";
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};
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adc1: adc@5a890000 {
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compatible = "nxp,imx8qxp-adc";
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reg = <0x5a890000 0x10000>;
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interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&gic>;
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clocks = <&adc1_lpcg 0>,
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<&adc1_lpcg 1>;
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clock-names = "per", "ipg";
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assigned-clocks = <&clk IMX_SC_R_ADC_1 IMX_SC_PM_CLK_PER>;
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assigned-clock-rates = <24000000>;
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power-domains = <&pd IMX_SC_R_ADC_1>;
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status = "disabled";
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};
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i2c0_lpcg: clock-controller@5ac00000 {
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compatible = "fsl,imx8qxp-lpcg";
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reg = <0x5ac00000 0x10000>;
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@ -203,4 +231,28 @@ dma_subsys: bus@5a000000 {
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"i2c3_lpcg_ipg_clk";
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power-domains = <&pd IMX_SC_R_I2C_3>;
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};
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adc0_lpcg: clock-controller@5ac80000 {
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compatible = "fsl,imx8qxp-lpcg";
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reg = <0x5ac80000 0x10000>;
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#clock-cells = <1>;
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clocks = <&clk IMX_SC_R_ADC_0 IMX_SC_PM_CLK_PER>,
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<&dma_ipg_clk>;
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clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>;
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clock-output-names = "adc0_lpcg_clk",
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"adc0_lpcg_ipg_clk";
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power-domains = <&pd IMX_SC_R_ADC_0>;
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};
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adc1_lpcg: clock-controller@5ac90000 {
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compatible = "fsl,imx8qxp-lpcg";
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reg = <0x5ac90000 0x10000>;
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#clock-cells = <1>;
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clocks = <&clk IMX_SC_R_ADC_1 IMX_SC_PM_CLK_PER>,
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<&dma_ipg_clk>;
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clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>;
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clock-output-names = "adc1_lpcg_clk",
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"adc1_lpcg_ipg_clk";
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power-domains = <&pd IMX_SC_R_ADC_1>;
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};
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};
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@ -11,6 +11,10 @@
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clock-frequency = <160000000>;
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};
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&adc0 {
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interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
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};
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&i2c0 {
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compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
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interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
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