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ARM: at91: rm9200: switch back to clockevents_config_and_register
The timer code for at91rm9200 was already converted some time ago by Shawn Guo in commit838a2ae
(ARM: use clockevents_config_and_register() where possible) but because of a rounding issue in the timer core this resulted in an easily reproducible oops. So it was reverted (commitb7a8ca5
(ARM: at91: rm9200 fix time support)) which stopped the oops from happening because min_delta_ns is increased by one in arch code which stopped from problem from happening. Now that the timer core problem is fixed (commit a4578ea (clockevents: Sanitize ticks to nsec conversion)), we can switch back to the clockevents_config_and_register helper. Tested-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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@ -174,7 +174,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
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static struct clock_event_device clkevt = {
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.name = "at91_tick",
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.shift = 32,
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.rating = 150,
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.set_next_event = clkevt32k_next_event,
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.set_mode = clkevt32k_mode,
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@ -265,11 +264,9 @@ void __init at91rm9200_timer_init(void)
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at91_st_write(AT91_ST_RTMR, 1);
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/* Setup timer clockevent, with minimum of two ticks (important!!) */
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clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
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clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
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clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
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clkevt.cpumask = cpumask_of(0);
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clockevents_register_device(&clkevt);
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clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK,
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2, AT91_ST_ALMV);
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/* register clocksource */
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clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);
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