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mmc: host: Drop redundant MMC_CAP_ERASE
The MMC_CAP_ERASE bit is no longer used by the mmc core as erase, discard and trim operations are now always supported. Therefore, drop the bit and move all mmc hosts away from using it. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Rui Miguel Silva <rmfrfs@gmail.com> Link: https://lore.kernel.org/r/20200508112902.23575-1-ulf.hansson@linaro.org Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
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94fe2580a2
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1be64c7963
@ -1280,8 +1280,7 @@ static int bcm2835_add_host(struct bcm2835_host *host)
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/* host controller capabilities */
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mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED |
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MMC_CAP_NEEDS_POLL | MMC_CAP_HW_RESET | MMC_CAP_ERASE |
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MMC_CAP_CMD23;
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MMC_CAP_NEEDS_POLL | MMC_CAP_HW_RESET | MMC_CAP_CMD23;
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spin_lock_init(&host->lock);
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mutex_init(&host->mutex);
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@ -1038,8 +1038,7 @@ int cvm_mmc_of_slot_probe(struct device *dev, struct cvm_mmc_host *host)
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* Disable bounce buffers for max_segs = 1
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*/
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mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
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MMC_CAP_ERASE | MMC_CAP_CMD23 | MMC_CAP_POWER_OFF_CARD |
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MMC_CAP_3_3V_DDR;
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MMC_CAP_CMD23 | MMC_CAP_POWER_OFF_CARD | MMC_CAP_3_3V_DDR;
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if (host->use_sg)
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mmc->max_segs = 16;
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@ -2751,12 +2751,6 @@ static int dw_mci_init_slot_caps(struct dw_mci_slot *slot)
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if (host->pdata->caps)
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mmc->caps = host->pdata->caps;
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/*
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* Support MMC_CAP_ERASE by default.
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* It needs to use trim/discard/erase commands.
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*/
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mmc->caps |= MMC_CAP_ERASE;
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if (host->pdata->pm_caps)
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mmc->pm_caps = host->pdata->pm_caps;
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@ -564,7 +564,7 @@ static int meson_mx_mmc_add_host(struct meson_mx_mmc_host *host)
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mmc->f_max = clk_round_rate(host->cfg_div_clk,
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clk_get_rate(host->parent_clk));
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mmc->caps |= MMC_CAP_ERASE | MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY;
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mmc->caps |= MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY;
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mmc->ops = &meson_mx_mmc_ops;
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ret = mmc_of_parse(mmc);
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@ -2326,7 +2326,7 @@ static int msdc_drv_probe(struct platform_device *pdev)
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if (mmc->caps & MMC_CAP_SDIO_IRQ)
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mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD;
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mmc->caps |= MMC_CAP_ERASE | MMC_CAP_CMD23;
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mmc->caps |= MMC_CAP_CMD23;
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/* MMC core transfer sizes tunable parameters */
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mmc->max_segs = MAX_BD_NUM;
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if (host->dev_comp->support_64g)
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@ -752,8 +752,6 @@ static int mvsd_probe(struct platform_device *pdev)
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if (maxfreq)
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mmc->f_max = maxfreq;
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mmc->caps |= MMC_CAP_ERASE;
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spin_lock_init(&host->lock);
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host->base = devm_platform_ioremap_resource(pdev, 0);
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@ -634,8 +634,7 @@ static int mxs_mmc_probe(struct platform_device *pdev)
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/* set mmc core parameters */
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mmc->ops = &mxs_mmc_ops;
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mmc->caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED |
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MMC_CAP_SDIO_IRQ | MMC_CAP_NEEDS_POLL | MMC_CAP_CMD23 |
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MMC_CAP_ERASE;
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MMC_CAP_SDIO_IRQ | MMC_CAP_NEEDS_POLL | MMC_CAP_CMD23;
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host->broken_cd = of_property_read_bool(np, "broken-cd");
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@ -1244,7 +1244,7 @@ static int mmc_omap_new_slot(struct mmc_omap_host *host, int id)
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mmc->caps = 0;
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if (host->pdata->slots[id].wires >= 4)
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mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_ERASE;
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mmc->caps |= MMC_CAP_4_BIT_DATA;
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mmc->ops = &mmc_omap_ops;
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mmc->f_min = 400000;
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@ -1922,7 +1922,7 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
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mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
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mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
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MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE | MMC_CAP_CMD23;
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MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_CMD23;
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mmc->caps |= mmc_pdata(host)->caps;
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if (mmc->caps & MMC_CAP_8_BIT_DATA)
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@ -1347,7 +1347,7 @@ static void realtek_init_host(struct realtek_pci_sdmmc *host)
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mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
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mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED |
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MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST |
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MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_ERASE;
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MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25;
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mmc->caps2 = MMC_CAP2_NO_PRESCAN_POWERUP | MMC_CAP2_FULL_PWR_CYCLE;
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mmc->max_current_330 = 400;
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mmc->max_current_180 = 800;
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@ -1314,7 +1314,7 @@ static void rtsx_usb_init_host(struct rtsx_usb_sdmmc *host)
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mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED |
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MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST |
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MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 |
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MMC_CAP_ERASE | MMC_CAP_SYNC_RUNTIME_PM;
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MMC_CAP_SYNC_RUNTIME_PM;
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mmc->caps2 = MMC_CAP2_NO_PRESCAN_POWERUP | MMC_CAP2_FULL_PWR_CYCLE |
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MMC_CAP2_NO_SDIO;
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@ -4331,7 +4331,7 @@ int sdhci_setup_host(struct sdhci_host *host)
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!host->ops->get_max_timeout_count)
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mmc->max_busy_timeout = 0;
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mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_ERASE | MMC_CAP_CMD23;
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mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_CMD23;
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mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD;
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if (host->quirks & SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12)
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@ -1394,7 +1394,7 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
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mmc->f_min = 400000;
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mmc->f_max = 52000000;
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mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
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MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ;
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MMC_CAP_SDIO_IRQ;
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/*
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* Some H5 devices do not have signal traces precise enough to
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@ -1128,7 +1128,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
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if (ret == -EPROBE_DEFER)
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return ret;
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mmc->caps |= MMC_CAP_ERASE | MMC_CAP_4_BIT_DATA | pdata->capabilities;
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mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
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mmc->caps2 |= pdata->capabilities2;
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mmc->max_segs = pdata->max_segs ? : 32;
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mmc->max_blk_size = TMIO_MAX_BLK_SIZE;
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@ -67,7 +67,6 @@ static void _gb_sdio_set_host_caps(struct gb_sdio_host *host, u32 r)
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((r & GB_SDIO_CAP_8_BIT_DATA) ? MMC_CAP_8_BIT_DATA : 0) |
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((r & GB_SDIO_CAP_MMC_HS) ? MMC_CAP_MMC_HIGHSPEED : 0) |
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((r & GB_SDIO_CAP_SD_HS) ? MMC_CAP_SD_HIGHSPEED : 0) |
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((r & GB_SDIO_CAP_ERASE) ? MMC_CAP_ERASE : 0) |
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((r & GB_SDIO_CAP_1_2V_DDR) ? MMC_CAP_1_2V_DDR : 0) |
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((r & GB_SDIO_CAP_1_8V_DDR) ? MMC_CAP_1_8V_DDR : 0) |
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((r & GB_SDIO_CAP_POWER_OFF_CARD) ? MMC_CAP_POWER_OFF_CARD : 0) |
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@ -321,7 +321,6 @@ struct mmc_host {
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#define MMC_CAP_AGGRESSIVE_PM (1 << 7) /* Suspend (e)MMC/SD at idle */
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#define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */
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#define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */
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#define MMC_CAP_ERASE (1 << 10) /* Allow erase/trim commands */
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#define MMC_CAP_3_3V_DDR (1 << 11) /* Host supports eMMC DDR 3.3V */
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#define MMC_CAP_1_8V_DDR (1 << 12) /* Host supports eMMC DDR 1.8V */
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#define MMC_CAP_1_2V_DDR (1 << 13) /* Host supports eMMC DDR 1.2V */
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