hwmon: (k10temp) Add temperature offset for Ryzen 2700X

Ryzen 2700X has a temperature offset of 10 degrees C. If bit 19 of the
Temperature Control register is set, there is an additional offset of
49 degrees C. Take this into account as well.

Cc: stable@vger.kernel.org # v4.16+
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
This commit is contained in:
Guenter Roeck 2018-04-24 06:55:55 -07:00
parent dbac00f0cf
commit 1b59788979

View File

@ -72,6 +72,7 @@ struct k10temp_data {
struct pci_dev *pdev; struct pci_dev *pdev;
void (*read_tempreg)(struct pci_dev *pdev, u32 *regval); void (*read_tempreg)(struct pci_dev *pdev, u32 *regval);
int temp_offset; int temp_offset;
u32 temp_adjust_mask;
}; };
struct tctl_offset { struct tctl_offset {
@ -84,6 +85,7 @@ static const struct tctl_offset tctl_offset_table[] = {
{ 0x17, "AMD Ryzen 5 1600X", 20000 }, { 0x17, "AMD Ryzen 5 1600X", 20000 },
{ 0x17, "AMD Ryzen 7 1700X", 20000 }, { 0x17, "AMD Ryzen 7 1700X", 20000 },
{ 0x17, "AMD Ryzen 7 1800X", 20000 }, { 0x17, "AMD Ryzen 7 1800X", 20000 },
{ 0x17, "AMD Ryzen 7 2700X", 10000 },
{ 0x17, "AMD Ryzen Threadripper 1950X", 27000 }, { 0x17, "AMD Ryzen Threadripper 1950X", 27000 },
{ 0x17, "AMD Ryzen Threadripper 1920X", 27000 }, { 0x17, "AMD Ryzen Threadripper 1920X", 27000 },
{ 0x17, "AMD Ryzen Threadripper 1900X", 27000 }, { 0x17, "AMD Ryzen Threadripper 1900X", 27000 },
@ -129,6 +131,8 @@ static ssize_t temp1_input_show(struct device *dev,
data->read_tempreg(data->pdev, &regval); data->read_tempreg(data->pdev, &regval);
temp = (regval >> 21) * 125; temp = (regval >> 21) * 125;
if (regval & data->temp_adjust_mask)
temp -= 49000;
if (temp > data->temp_offset) if (temp > data->temp_offset)
temp -= data->temp_offset; temp -= data->temp_offset;
else else
@ -259,12 +263,14 @@ static int k10temp_probe(struct pci_dev *pdev,
data->pdev = pdev; data->pdev = pdev;
if (boot_cpu_data.x86 == 0x15 && (boot_cpu_data.x86_model == 0x60 || if (boot_cpu_data.x86 == 0x15 && (boot_cpu_data.x86_model == 0x60 ||
boot_cpu_data.x86_model == 0x70)) boot_cpu_data.x86_model == 0x70)) {
data->read_tempreg = read_tempreg_nb_f15; data->read_tempreg = read_tempreg_nb_f15;
else if (boot_cpu_data.x86 == 0x17) } else if (boot_cpu_data.x86 == 0x17) {
data->temp_adjust_mask = 0x80000;
data->read_tempreg = read_tempreg_nb_f17; data->read_tempreg = read_tempreg_nb_f17;
else } else {
data->read_tempreg = read_tempreg_pci; data->read_tempreg = read_tempreg_pci;
}
for (i = 0; i < ARRAY_SIZE(tctl_offset_table); i++) { for (i = 0; i < ARRAY_SIZE(tctl_offset_table); i++) {
const struct tctl_offset *entry = &tctl_offset_table[i]; const struct tctl_offset *entry = &tctl_offset_table[i];