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Fix typos concerning hierarchy
heirarchical, hierachical -> hierarchical heirarchy, hierachy -> hierarchy Signed-off-by: Uwe Kleine-König <zeisberg@informatik.uni-freiburg.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
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@ -65,7 +65,7 @@ Accessing legacy resources through sysfs
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----------------------------------------
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Legacy I/O port and ISA memory resources are also provided in sysfs if the
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underlying platform supports them. They're located in the PCI class heirarchy,
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underlying platform supports them. They're located in the PCI class hierarchy,
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e.g.
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/sys/class/pci_bus/0000:17/
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@ -17,7 +17,7 @@ of the board-specific code (with the exception of stboards) ended up
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in arch/sh/kernel/ directly, with board-specific headers ending up in
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include/asm-sh/. For the new kernel, things are broken out by board type,
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companion chip type, and CPU type. Looking at a tree view of this directory
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heirarchy looks like the following:
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hierarchy looks like the following:
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Board-specific code:
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@ -108,7 +108,7 @@ overloading), and you can feel free to name the directory after the family
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member itself.
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There are a few things that each board is required to have, both in the
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arch/sh/boards and the include/asm-sh/ heirarchy. In order to better
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arch/sh/boards and the include/asm-sh/ hierarchy. In order to better
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explain this, we use some examples for adding an imaginary board. For
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setup code, we're required at the very least to provide definitions for
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get_system_type() and platform_setup(). For our imaginary board, this
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@ -154,7 +154,7 @@ EXPORT_SYMBOL_GPL(of_node_to_nid);
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* characteristics relative to its multiple connections. We ignore
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* this for now. We also assume that all cpu and memory sets have
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* their distances represented at a common level. This won't be
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* true for heirarchical NUMA.
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* true for hierarchical NUMA.
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*
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* In any case the ibm,associativity-reference-points should give
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* the correct depth for a normal NUMA system.
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@ -915,7 +915,7 @@ static int dvb_frontend_ioctl(struct inode *inode, struct file *file,
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fetunesettings.parameters.inversion = INVERSION_AUTO;
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}
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if (fe->ops.info.type == FE_OFDM) {
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/* without hierachical coding code_rate_LP is irrelevant,
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/* without hierarchical coding code_rate_LP is irrelevant,
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* so we tolerate the otherwise invalid FEC_NONE setting */
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if (fepriv->parameters.u.ofdm.hierarchy_information == HIERARCHY_NONE &&
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fepriv->parameters.u.ofdm.code_rate_LP == FEC_NONE)
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@ -239,7 +239,7 @@ static int dib3000mb_set_frontend(struct dvb_frontend* fe,
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default:
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return -EINVAL;
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}
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deb_setf("hierachy: ");
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deb_setf("hierarchy: ");
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switch (ofdm->hierarchy_information) {
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case HIERARCHY_NONE:
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deb_setf("none ");
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@ -85,7 +85,7 @@ struct aer_rpc {
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struct mutex rpc_mutex; /*
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* only one thread could do
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* recovery on the same
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* root port hierachy
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* root port hierarchy
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*/
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wait_queue_head_t wait_release;
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};
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@ -855,7 +855,7 @@ static FC_CLASS_DEVICE_ATTR(rport, fast_io_fail_tmo, S_IRUGO | S_IWUSR,
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/*
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* Note: in the target show function we recognize when the remote
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* port is in the heirarchy and do not allow the driver to get
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* port is in the hierarchy and do not allow the driver to get
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* involved in sysfs functions. The driver only gets involved if
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* it's the "old" style that doesn't use rports.
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*/
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@ -500,7 +500,7 @@ struct sas_phy *sas_phy_alloc(struct device *parent, int number)
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EXPORT_SYMBOL(sas_phy_alloc);
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/**
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* sas_phy_add -- add a SAS PHY to the device hierachy
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* sas_phy_add -- add a SAS PHY to the device hierarchy
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* @phy: The PHY to be added
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*
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* Publishes a SAS PHY to the rest of the system.
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@ -1265,7 +1265,7 @@ struct sas_rphy *sas_expander_alloc(struct sas_port *parent,
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EXPORT_SYMBOL(sas_expander_alloc);
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/**
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* sas_rphy_add -- add a SAS remote PHY to the device hierachy
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* sas_rphy_add -- add a SAS remote PHY to the device hierarchy
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* @rphy: The remote PHY to be added
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*
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* Publishes a SAS remote PHY to the rest of the system.
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@ -1,5 +1,5 @@
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The CIFS VFS support for Linux supports many advanced network filesystem
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features such as heirarchical dfs like namespace, hardlinks, locking and more.
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features such as hierarchical dfs like namespace, hardlinks, locking and more.
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It was designed to comply with the SNIA CIFS Technical Reference (which
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supersedes the 1992 X/Open SMB Standard) as well as to perform best practice
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practical interoperability with Windows 2000, Windows XP, Samba and equivalent
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@ -1098,7 +1098,7 @@ static int ocfs2_rename(struct inode *old_dir,
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BUG();
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}
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/* Assume a directory heirarchy thusly:
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/* Assume a directory hierarchy thusly:
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* a/b/c
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* a/d
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* a,b,c, and d are all directories.
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@ -32,7 +32,7 @@
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#define PAL_CACHE_FLUSH 1 /* flush i/d cache */
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#define PAL_CACHE_INFO 2 /* get detailed i/d cache info */
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#define PAL_CACHE_INIT 3 /* initialize i/d cache */
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#define PAL_CACHE_SUMMARY 4 /* get summary of cache heirarchy */
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#define PAL_CACHE_SUMMARY 4 /* get summary of cache hierarchy */
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#define PAL_MEM_ATTRIB 5 /* list supported memory attributes */
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#define PAL_PTCE_INFO 6 /* purge TLB info */
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#define PAL_VM_INFO 7 /* return supported virtual memory features */
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@ -113,14 +113,14 @@ typedef s64 pal_status_t;
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*/
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#define PAL_STATUS_REQUIRES_MEMORY (-9) /* Call requires PAL memory buffer */
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/* Processor cache level in the heirarchy */
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/* Processor cache level in the hierarchy */
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typedef u64 pal_cache_level_t;
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#define PAL_CACHE_LEVEL_L0 0 /* L0 */
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#define PAL_CACHE_LEVEL_L1 1 /* L1 */
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#define PAL_CACHE_LEVEL_L2 2 /* L2 */
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/* Processor cache type at a particular level in the heirarchy */
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/* Processor cache type at a particular level in the hierarchy */
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typedef u64 pal_cache_type_t;
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#define PAL_CACHE_TYPE_INSTRUCTION 1 /* Instruction cache */
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@ -272,14 +272,14 @@ typedef struct pal_cache_protection_info_s {
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#define PAL_CACHE_PROT_METHOD_ECC 3 /* ECC protection */
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/* Processor cache line identification in the heirarchy */
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/* Processor cache line identification in the hierarchy */
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typedef union pal_cache_line_id_u {
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u64 pclid_data;
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struct {
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u64 cache_type : 8, /* 7-0 cache type */
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level : 8, /* 15-8 level of the
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* cache in the
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* heirarchy.
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* hierarchy.
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*/
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way : 8, /* 23-16 way in the set
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*/
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@ -292,7 +292,7 @@ typedef union pal_cache_line_id_u {
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u64 cache_type : 8, /* 7-0 cache type */
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level : 8, /* 15-8 level of the
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* cache in the
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* heirarchy.
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* hierarchy.
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*/
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way : 8, /* 23-16 way in the set
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*/
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@ -978,7 +978,7 @@ ia64_pal_cache_read (pal_cache_line_id_u_t line_id, u64 physical_addr)
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return iprv.status;
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}
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/* Return summary information about the heirarchy of caches controlled by the processor */
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/* Return summary information about the hierarchy of caches controlled by the processor */
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static inline s64
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ia64_pal_cache_summary (u64 *cache_levels, u64 *unique_caches)
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{
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