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drm/amd/display: Run idle optimizations at end of vblank handler

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[Why & How]
1. After allowing idle optimizations, hw programming is disallowed.
2. Before hw programming, we need to disallow idle optimizations.

Otherwise, in scenario 1, we will immediately kick hw out of idle
optimizations with register access.

Scenario 2 is less of a concern, since any register access will kick
hw out of idle optimizations. But we'll do it early for correctness.

Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Leo Li 2024-07-11 14:38:11 -04:00 committed by Alex Deucher
parent 7fb363c575
commit 17e68f8913
1 changed files with 9 additions and 3 deletions
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12
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
View File

@ -251,9 +251,10 @@ static void amdgpu_dm_crtc_vblank_control_worker(struct work_struct *work)
else if (dm->active_vblank_irq_count)
dm->active_vblank_irq_count--;
dc_allow_idle_optimizations(dm->dc, dm->active_vblank_irq_count == 0);
DRM_DEBUG_KMS("Allow idle optimizations (MALL): %d\n", dm->active_vblank_irq_count == 0);
if (dm->active_vblank_irq_count > 0) {
DRM_DEBUG_KMS("Allow idle optimizations (MALL): false\n");
dc_allow_idle_optimizations(dm->dc, false);
}
/*
* Control PSR based on vblank requirements from OS
@ -272,6 +273,11 @@ static void amdgpu_dm_crtc_vblank_control_worker(struct work_struct *work)
vblank_work->stream->link->replay_settings.replay_feature_enabled);
}
if (dm->active_vblank_irq_count == 0) {
DRM_DEBUG_KMS("Allow idle optimizations (MALL): true\n");
dc_allow_idle_optimizations(dm->dc, true);
}
mutex_unlock(&dm->dc_lock);
dc_stream_release(vblank_work->stream);