ath9k_hw: remove ATH9K_CAP_MCAST_KEYSRCH

The driver always sets this to enabled, but this can be simplified with
a small change to ah->sta_id1_defaults instead.
This change also removes the now-obsolete ath9k_hw_setcapability function.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Felix Fietkau 2010-06-12 17:22:32 +02:00 committed by John W. Linville
parent f32a488463
commit 16f2411fcb
4 changed files with 3 additions and 44 deletions

View File

@ -569,11 +569,6 @@ static void ath9k_init_crypto(struct ath9k_htc_priv *priv)
*/
for (i = 0; i < common->keymax; i++)
ath9k_hw_keyreset(priv->ah, (u16) i);
/* turn on mcast key search if possible */
if (!ath9k_hw_getcapability(priv->ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL))
(void)ath9k_hw_setcapability(priv->ah, ATH9K_CAP_MCAST_KEYSRCH,
1, 1, NULL);
}
static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)

View File

@ -425,7 +425,9 @@ static void ath9k_hw_init_defaults(struct ath_hw *ah)
ah->ah_flags = AH_USE_EEPROM;
ah->atim_window = 0;
ah->sta_id1_defaults = AR_STA_ID1_CRPT_MIC_ENABLE;
ah->sta_id1_defaults =
AR_STA_ID1_CRPT_MIC_ENABLE |
AR_STA_ID1_MCAST_KSRCH;
ah->beacon_interval = 100;
ah->enable_32kHz_clock = DONT_USE_32KHZ;
ah->slottime = (u32) -1;
@ -2259,20 +2261,6 @@ bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type,
u32 capability, u32 *result)
{
switch (type) {
case ATH9K_CAP_MCAST_KEYSRCH:
switch (capability) {
case 0:
return true;
case 1:
if (REG_READ(ah, AR_STA_ID1) & AR_STA_ID1_ADHOC) {
return false;
} else {
return (ah->sta_id1_defaults &
AR_STA_ID1_MCAST_KSRCH) ? true :
false;
}
}
return false;
case ATH9K_CAP_DS:
return (AR_SREV_9280_20_OR_LATER(ah) &&
(ah->eep_ops->get_eeprom(ah, EEP_RC_CHAIN_MASK) == 1))
@ -2283,21 +2271,6 @@ bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type,
}
EXPORT_SYMBOL(ath9k_hw_getcapability);
bool ath9k_hw_setcapability(struct ath_hw *ah, enum ath9k_capability_type type,
u32 capability, u32 setting, int *status)
{
switch (type) {
case ATH9K_CAP_MCAST_KEYSRCH:
if (setting)
ah->sta_id1_defaults |= AR_STA_ID1_MCAST_KSRCH;
else
ah->sta_id1_defaults &= ~AR_STA_ID1_MCAST_KSRCH;
return true;
default:
return false;
}
}
EXPORT_SYMBOL(ath9k_hw_setcapability);
/****************************/
/* GPIO / RFKILL / Antennae */

View File

@ -207,7 +207,6 @@ enum ath9k_hw_caps {
};
enum ath9k_capability_type {
ATH9K_CAP_MCAST_KEYSRCH,
ATH9K_CAP_DS
};
@ -855,8 +854,6 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
int ath9k_hw_fill_cap_info(struct ath_hw *ah);
bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type,
u32 capability, u32 *result);
bool ath9k_hw_setcapability(struct ath_hw *ah, enum ath9k_capability_type type,
u32 capability, u32 setting, int *status);
u32 ath9k_regd_get_ctl(struct ath_regulatory *reg, struct ath9k_channel *chan);
/* Key Cache Management */

View File

@ -387,12 +387,6 @@ static void ath9k_init_crypto(struct ath_softc *sc)
*/
if (!(sc->sc_ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA))
common->splitmic = 1;
/* turn on mcast key search if possible */
if (!ath9k_hw_getcapability(sc->sc_ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL))
(void)ath9k_hw_setcapability(sc->sc_ah, ATH9K_CAP_MCAST_KEYSRCH,
1, 1, NULL);
}
static int ath9k_init_btcoex(struct ath_softc *sc)