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omap2/3/4: Replace orred CONFIG_ARCH_OMAP2/3/4 with CONFIG_ARCH_OMAP2PLUS
omap: Replace orred CONFIG_ARCH_OMAP2/3/4 with CONFIG_ARCH_OMAP2PLUS Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -29,7 +29,7 @@ config OMAP_PACKAGE_CBP
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bool
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comment "OMAP Board Type"
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depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP4
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depends on ARCH_OMAP2PLUS
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config MACH_OMAP_GENERIC
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bool "Generic OMAP board"
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@ -125,7 +125,7 @@ config OMAP_MPU_TIMER
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config OMAP_32K_TIMER
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bool "Use 32KHz timer"
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depends on ARCH_OMAP16XX || ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP4
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depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS
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help
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Select this option if you want to enable the OMAP 32KHz timer.
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This timer saves power compared to the OMAP_MPU_TIMER, and has
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@ -146,7 +146,7 @@ config OMAP_32K_TIMER_HZ
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config OMAP_DM_TIMER
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bool "Use dual-mode timer"
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depends on ARCH_OMAP16XX || ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP4
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depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS
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help
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Select this option if you want to use OMAP Dual-Mode timers.
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@ -1870,8 +1870,7 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id)
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#define omap1_dma_irq_handler NULL
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#endif
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#ifdef CONFIG_ARCH_OMAP2PLUS
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static int omap2_dma_handle_ch(int ch)
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{
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@ -153,8 +153,7 @@
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struct omap_dm_timer {
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unsigned long phys_base;
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int irq;
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#ifdef CONFIG_ARCH_OMAP2PLUS
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struct clk *iclk, *fclk;
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#endif
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void __iomem *io_base;
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@ -490,8 +489,7 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
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}
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EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
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#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#else
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struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
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{
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@ -535,8 +533,7 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer)
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if (l & OMAP_TIMER_CTRL_ST) {
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l &= ~0x1;
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omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#ifdef CONFIG_ARCH_OMAP2PLUS
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/* Readback to make sure write has completed */
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omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
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/*
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@ -781,8 +778,7 @@ int __init omap_dm_timer_init(void)
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timer->io_base = ioremap(timer->phys_base, map_size);
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BUG_ON(!timer->io_base);
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#ifdef CONFIG_ARCH_OMAP2PLUS
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if (cpu_class_is_omap2()) {
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char clk_name[16];
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sprintf(clk_name, "gpt%d_ick", i + 1);
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@ -177,13 +177,11 @@ struct gpio_bank {
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u16 irq;
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u16 virtual_irq_start;
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int method;
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#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2) || \
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defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
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#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
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u32 suspend_wakeup;
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u32 saved_wakeup;
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#endif
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#ifdef CONFIG_ARCH_OMAP2PLUS
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u32 non_wakeup_gpios;
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u32 enabled_non_wakeup_gpios;
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@ -592,8 +590,7 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
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reg += OMAP7XX_GPIO_DATA_OUTPUT;
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break;
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#endif
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#ifdef CONFIG_ARCH_OMAP2PLUS
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case METHOD_GPIO_24XX:
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reg += OMAP24XX_GPIO_DATAOUT;
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break;
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@ -684,8 +681,7 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time)
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}
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EXPORT_SYMBOL(omap_set_gpio_debounce_time);
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#ifdef CONFIG_ARCH_OMAP2PLUS
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static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
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int trigger)
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{
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@ -856,8 +852,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
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goto bad;
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break;
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#endif
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#ifdef CONFIG_ARCH_OMAP2PLUS
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case METHOD_GPIO_24XX:
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set_24xx_gpio_triggering(bank, gpio, trigger);
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break;
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@ -1131,8 +1126,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
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spin_unlock_irqrestore(&bank->lock, flags);
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return 0;
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#endif
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#ifdef CONFIG_ARCH_OMAP2PLUS
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case METHOD_GPIO_24XX:
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if (bank->non_wakeup_gpios & (1 << gpio)) {
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printk(KERN_ERR "Unable to modify wakeup on "
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@ -1227,8 +1221,7 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
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__raw_writel(1 << offset, reg);
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}
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#endif
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#ifdef CONFIG_ARCH_OMAP2PLUS
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if (bank->method == METHOD_GPIO_24XX) {
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/* Disable wake-up during idle for dynamic tick */
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void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
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@ -1809,8 +1802,7 @@ static int __init _omap_gpio_init(void)
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gpio_count = 32; /* 7xx has 32-bit GPIOs */
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}
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#ifdef CONFIG_ARCH_OMAP2PLUS
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if (bank->method == METHOD_GPIO_24XX) {
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static const u32 non_wakeup_gpios[] = {
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0xe203ffc0, 0x08700040
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@ -1903,8 +1895,7 @@ static int __init _omap_gpio_init(void)
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return 0;
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}
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#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2) || \
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defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
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#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
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static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
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{
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int i;
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@ -2013,8 +2004,7 @@ static struct sys_device omap_gpio_device = {
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#endif
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#ifdef CONFIG_ARCH_OMAP2PLUS
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static int workaround_enabled;
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@ -2240,8 +2230,7 @@ static int __init omap_gpio_sysinit(void)
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mpuio_init();
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#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2) || \
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defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
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#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
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if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
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if (ret == 0) {
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ret = sysdev_class_register(&omap_gpio_sysclass);
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@ -2300,8 +2289,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
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/* FIXME for at least omap2, show pullup/pulldown state */
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irqstat = irq_desc[irq].status;
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#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2) || \
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defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
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#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
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if (is_in && ((bank->suspend_wakeup & mask)
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|| irqstat & IRQ_TYPE_SENSE_MASK)) {
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char *trigger = NULL;
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@ -26,8 +26,7 @@ struct clkops {
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void (*find_companion)(struct clk *, void __iomem **, u8 *);
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};
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#ifdef CONFIG_ARCH_OMAP2PLUS
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struct clksel_rate {
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u32 val;
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@ -89,8 +88,7 @@ struct clk {
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__u8 enable_bit;
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__s8 usecount;
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u8 fixed_div;
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#ifdef CONFIG_ARCH_OMAP2PLUS
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void __iomem *clksel_reg;
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u32 clksel_mask;
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const struct clksel *clksel;
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@ -309,8 +309,7 @@
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#ifndef __ASSEMBLY__
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#ifdef CONFIG_ARCH_OMAP2PLUS
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extern void __iomem *omap_ctrl_base_get(void);
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extern u8 omap_ctrl_readb(u16 offset);
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extern u16 omap_ctrl_readw(u16 offset);
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@ -103,8 +103,7 @@
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#define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX
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#define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX
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#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#else
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#define OMAP_MCBSP_REG_DRR2 0x00
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#define OMAP_MCBSP_REG_DRR1 0x04
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@ -38,8 +38,7 @@
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*/
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#if defined(CONFIG_ARCH_OMAP1)
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#define PHYS_OFFSET UL(0x10000000)
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#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
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defined(CONFIG_ARCH_OMAP4)
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#else
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#define PHYS_OFFSET UL(0x80000000)
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#endif
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