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powerpc/mm: Move pte accessors that operate on common pte bits to pgtable.h
These pte functions will remain the same between radix and hash. Move them to pgtable.h. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Aneesh Kumar K.V
Michael Ellerman
parent
2e8735198a
commit
13f829a5a1
@ -135,66 +135,6 @@ static inline unsigned long pte_update(struct mm_struct *mm,
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return old;
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}
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/*
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* We currently remove entries from the hashtable regardless of whether
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* the entry was young or dirty.
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*
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* We should be more intelligent about this but for the moment we override
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* these functions and force a tlb flush unconditionally
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*/
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static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
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unsigned long addr, pte_t *ptep)
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{
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unsigned long old;
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if ((pte_val(*ptep) & (_PAGE_ACCESSED | H_PAGE_HASHPTE)) == 0)
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return 0;
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old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
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return (old & _PAGE_ACCESSED) != 0;
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}
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#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
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#define ptep_test_and_clear_young(__vma, __addr, __ptep) \
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({ \
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int __r; \
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__r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
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__r; \
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})
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#define __HAVE_ARCH_PTEP_SET_WRPROTECT
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static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep)
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{
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if ((pte_val(*ptep) & _PAGE_WRITE) == 0)
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return;
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pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 0);
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}
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static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
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unsigned long addr, pte_t *ptep)
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{
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if ((pte_val(*ptep) & _PAGE_WRITE) == 0)
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return;
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pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 1);
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}
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#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
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static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
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unsigned long addr, pte_t *ptep)
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{
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unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0);
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return __pte(old);
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}
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static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
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pte_t * ptep)
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{
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pte_update(mm, addr, ptep, ~0UL, 0, 0);
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}
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/* Set the dirty and/or accessed bits atomically in a linux PTE, this
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* function doesn't need to flush the hash entry
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*/
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@ -237,112 +177,7 @@ static inline unsigned long pgd_page_vaddr(pgd_t pgd)
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/* Generic accessors to PTE bits */
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static inline int pte_write(pte_t pte) { return !!(pte_val(pte) & _PAGE_WRITE);}
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static inline int pte_dirty(pte_t pte) { return !!(pte_val(pte) & _PAGE_DIRTY); }
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static inline int pte_young(pte_t pte) { return !!(pte_val(pte) & _PAGE_ACCESSED); }
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static inline int pte_special(pte_t pte) { return !!(pte_val(pte) & _PAGE_SPECIAL); }
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static inline int pte_none(pte_t pte) { return (pte_val(pte) & ~H_PTE_NONE_MASK) == 0; }
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static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
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#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
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static inline bool pte_soft_dirty(pte_t pte)
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{
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return !!(pte_val(pte) & _PAGE_SOFT_DIRTY);
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}
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static inline pte_t pte_mksoft_dirty(pte_t pte)
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{
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return __pte(pte_val(pte) | _PAGE_SOFT_DIRTY);
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}
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static inline pte_t pte_clear_soft_dirty(pte_t pte)
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{
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return __pte(pte_val(pte) & ~_PAGE_SOFT_DIRTY);
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}
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#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
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#ifdef CONFIG_NUMA_BALANCING
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/*
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* These work without NUMA balancing but the kernel does not care. See the
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* comment in include/asm-generic/pgtable.h . On powerpc, this will only
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* work for user pages and always return true for kernel pages.
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*/
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static inline int pte_protnone(pte_t pte)
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{
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return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PRIVILEGED)) ==
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(_PAGE_PRESENT | _PAGE_PRIVILEGED);
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}
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#endif /* CONFIG_NUMA_BALANCING */
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static inline int pte_present(pte_t pte)
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{
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return !!(pte_val(pte) & _PAGE_PRESENT);
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}
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/* Conversion functions: convert a page and protection to a page entry,
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* and a page entry and page directory to the page they refer to.
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*
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* Even if PTEs can be unsigned long long, a PFN is always an unsigned
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* long for now.
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*/
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static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
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{
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return __pte((((pte_basic_t)(pfn) << PAGE_SHIFT) & PTE_RPN_MASK) |
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pgprot_val(pgprot));
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}
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static inline unsigned long pte_pfn(pte_t pte)
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{
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return (pte_val(pte) & PTE_RPN_MASK) >> PAGE_SHIFT;
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}
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/* Generic modifiers for PTE bits */
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static inline pte_t pte_wrprotect(pte_t pte)
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{
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return __pte(pte_val(pte) & ~_PAGE_WRITE);
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}
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static inline pte_t pte_mkclean(pte_t pte)
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{
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return __pte(pte_val(pte) & ~_PAGE_DIRTY);
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}
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static inline pte_t pte_mkold(pte_t pte)
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{
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return __pte(pte_val(pte) & ~_PAGE_ACCESSED);
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}
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static inline pte_t pte_mkwrite(pte_t pte)
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{
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/*
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* write implies read, hence set both
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*/
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return __pte(pte_val(pte) | _PAGE_RW);
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}
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static inline pte_t pte_mkdirty(pte_t pte)
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{
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return __pte(pte_val(pte) | _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
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}
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static inline pte_t pte_mkyoung(pte_t pte)
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{
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return __pte(pte_val(pte) | _PAGE_ACCESSED);
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}
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static inline pte_t pte_mkspecial(pte_t pte)
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{
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return __pte(pte_val(pte) | _PAGE_SPECIAL);
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}
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static inline pte_t pte_mkhuge(pte_t pte)
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{
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return pte;
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}
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static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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{
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return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
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}
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/* This low level function performs the actual PTE insertion
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* Setting the PTE depends on the MMU type and other factors. It's
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@ -359,46 +194,6 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
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*ptep = pte;
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}
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#define _PAGE_CACHE_CTL (_PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT)
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#define pgprot_noncached pgprot_noncached
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static inline pgprot_t pgprot_noncached(pgprot_t prot)
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{
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return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) |
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_PAGE_NON_IDEMPOTENT);
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}
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#define pgprot_noncached_wc pgprot_noncached_wc
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static inline pgprot_t pgprot_noncached_wc(pgprot_t prot)
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{
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return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) |
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_PAGE_TOLERANT);
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}
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#define pgprot_cached pgprot_cached
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static inline pgprot_t pgprot_cached(pgprot_t prot)
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{
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return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL));
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}
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#define pgprot_writecombine pgprot_writecombine
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static inline pgprot_t pgprot_writecombine(pgprot_t prot)
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{
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return pgprot_noncached_wc(prot);
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}
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/*
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* check a pte mapping have cache inhibited property
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*/
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static inline bool pte_ci(pte_t pte)
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{
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unsigned long pte_v = pte_val(pte);
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if (((pte_v & _PAGE_CACHE_CTL) == _PAGE_TOLERANT) ||
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((pte_v & _PAGE_CACHE_CTL) == _PAGE_NON_IDEMPOTENT))
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return true;
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return false;
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}
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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extern void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr,
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pmd_t *pmdp, unsigned long old_pmd);
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@ -201,6 +201,215 @@
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#endif /* __real_pte */
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/*
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* For hash even if we have _PAGE_ACCESSED = 0, we do a pte_update.
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* We currently remove entries from the hashtable regardless of whether
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* the entry was young or dirty.
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*
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* We should be more intelligent about this but for the moment we override
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* these functions and force a tlb flush unconditionally
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* For radix: H_PAGE_HASHPTE should be zero. Hence we can use the same
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* function for both hash and radix.
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*/
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static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
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unsigned long addr, pte_t *ptep)
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{
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unsigned long old;
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if ((pte_val(*ptep) & (_PAGE_ACCESSED | H_PAGE_HASHPTE)) == 0)
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return 0;
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old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
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return (old & _PAGE_ACCESSED) != 0;
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}
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#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
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#define ptep_test_and_clear_young(__vma, __addr, __ptep) \
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({ \
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int __r; \
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__r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
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__r; \
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})
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#define __HAVE_ARCH_PTEP_SET_WRPROTECT
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static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep)
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{
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if ((pte_val(*ptep) & _PAGE_WRITE) == 0)
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return;
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pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 0);
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}
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static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
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unsigned long addr, pte_t *ptep)
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{
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if ((pte_val(*ptep) & _PAGE_WRITE) == 0)
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return;
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pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 1);
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}
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#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
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static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
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unsigned long addr, pte_t *ptep)
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{
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unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0);
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return __pte(old);
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}
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static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
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pte_t * ptep)
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{
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pte_update(mm, addr, ptep, ~0UL, 0, 0);
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}
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static inline int pte_write(pte_t pte) { return !!(pte_val(pte) & _PAGE_WRITE);}
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static inline int pte_dirty(pte_t pte) { return !!(pte_val(pte) & _PAGE_DIRTY); }
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static inline int pte_young(pte_t pte) { return !!(pte_val(pte) & _PAGE_ACCESSED); }
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static inline int pte_special(pte_t pte) { return !!(pte_val(pte) & _PAGE_SPECIAL); }
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static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
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#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
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static inline bool pte_soft_dirty(pte_t pte)
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{
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return !!(pte_val(pte) & _PAGE_SOFT_DIRTY);
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}
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static inline pte_t pte_mksoft_dirty(pte_t pte)
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{
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return __pte(pte_val(pte) | _PAGE_SOFT_DIRTY);
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}
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static inline pte_t pte_clear_soft_dirty(pte_t pte)
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{
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return __pte(pte_val(pte) & ~_PAGE_SOFT_DIRTY);
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}
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#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
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#ifdef CONFIG_NUMA_BALANCING
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/*
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* These work without NUMA balancing but the kernel does not care. See the
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* comment in include/asm-generic/pgtable.h . On powerpc, this will only
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* work for user pages and always return true for kernel pages.
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*/
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static inline int pte_protnone(pte_t pte)
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{
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return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PRIVILEGED)) ==
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(_PAGE_PRESENT | _PAGE_PRIVILEGED);
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}
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#endif /* CONFIG_NUMA_BALANCING */
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static inline int pte_present(pte_t pte)
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{
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return !!(pte_val(pte) & _PAGE_PRESENT);
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}
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/*
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* Conversion functions: convert a page and protection to a page entry,
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* and a page entry and page directory to the page they refer to.
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*
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* Even if PTEs can be unsigned long long, a PFN is always an unsigned
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* long for now.
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*/
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static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
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{
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return __pte((((pte_basic_t)(pfn) << PAGE_SHIFT) & PTE_RPN_MASK) |
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pgprot_val(pgprot));
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}
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static inline unsigned long pte_pfn(pte_t pte)
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{
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return (pte_val(pte) & PTE_RPN_MASK) >> PAGE_SHIFT;
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}
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/* Generic modifiers for PTE bits */
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static inline pte_t pte_wrprotect(pte_t pte)
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{
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return __pte(pte_val(pte) & ~_PAGE_WRITE);
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}
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static inline pte_t pte_mkclean(pte_t pte)
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{
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return __pte(pte_val(pte) & ~_PAGE_DIRTY);
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}
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static inline pte_t pte_mkold(pte_t pte)
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{
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return __pte(pte_val(pte) & ~_PAGE_ACCESSED);
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}
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static inline pte_t pte_mkwrite(pte_t pte)
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{
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/*
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* write implies read, hence set both
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*/
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return __pte(pte_val(pte) | _PAGE_RW);
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}
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static inline pte_t pte_mkdirty(pte_t pte)
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{
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return __pte(pte_val(pte) | _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
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}
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static inline pte_t pte_mkyoung(pte_t pte)
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{
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return __pte(pte_val(pte) | _PAGE_ACCESSED);
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}
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static inline pte_t pte_mkspecial(pte_t pte)
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{
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return __pte(pte_val(pte) | _PAGE_SPECIAL);
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}
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static inline pte_t pte_mkhuge(pte_t pte)
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{
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return pte;
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}
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static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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{
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/* FIXME!! check whether this need to be a conditional */
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return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
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}
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#define _PAGE_CACHE_CTL (_PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT)
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#define pgprot_noncached pgprot_noncached
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static inline pgprot_t pgprot_noncached(pgprot_t prot)
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{
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return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) |
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_PAGE_NON_IDEMPOTENT);
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}
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#define pgprot_noncached_wc pgprot_noncached_wc
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static inline pgprot_t pgprot_noncached_wc(pgprot_t prot)
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{
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return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) |
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_PAGE_TOLERANT);
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}
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#define pgprot_cached pgprot_cached
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static inline pgprot_t pgprot_cached(pgprot_t prot)
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{
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return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL));
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}
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#define pgprot_writecombine pgprot_writecombine
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static inline pgprot_t pgprot_writecombine(pgprot_t prot)
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{
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return pgprot_noncached_wc(prot);
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}
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/*
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* check a pte mapping have cache inhibited property
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*/
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static inline bool pte_ci(pte_t pte)
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{
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unsigned long pte_v = pte_val(pte);
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if (((pte_v & _PAGE_CACHE_CTL) == _PAGE_TOLERANT) ||
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((pte_v & _PAGE_CACHE_CTL) == _PAGE_NON_IDEMPOTENT))
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return true;
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return false;
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}
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static inline void pmd_set(pmd_t *pmdp, unsigned long val)
|
||||
{
|
||||
*pmdp = __pmd(val);
|
||||
|
||||
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Reference in New Issue
Block a user