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sh: move the ioremap implementation out of line
Move the internal implementation details of ioremap out of line, no need to expose any of this to drivers for a slow path API. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Rich Felker <dalias@libc.org>
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@ -242,109 +242,38 @@ unsigned long long poke_real_address_q(unsigned long long addr,
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#define phys_to_virt(address) (__va(address))
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#endif
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/*
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* On 32-bit SH, we traditionally have the whole physical address space
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* mapped at all times (as MIPS does), so "ioremap()" and "iounmap()" do
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* not need to do anything but place the address in the proper segment.
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* This is true for P1 and P2 addresses, as well as some P3 ones.
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* However, most of the P3 addresses and newer cores using extended
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* addressing need to map through page tables, so the ioremap()
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* implementation becomes a bit more complicated.
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*
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* See arch/sh/mm/ioremap.c for additional notes on this.
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*
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* We cheat a bit and always return uncachable areas until we've fixed
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* the drivers to handle caching properly.
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*
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* On the SH-5 the concept of segmentation in the 1:1 PXSEG sense simply
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* doesn't exist, so everything must go through page tables.
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*/
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#ifdef CONFIG_MMU
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void iounmap(void __iomem *addr);
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void __iomem *__ioremap_caller(phys_addr_t offset, unsigned long size,
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pgprot_t prot, void *caller);
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void iounmap(void __iomem *addr);
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static inline void __iomem *
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__ioremap(phys_addr_t offset, unsigned long size, pgprot_t prot)
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{
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return __ioremap_caller(offset, size, prot, __builtin_return_address(0));
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}
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static inline void __iomem *
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__ioremap_29bit(phys_addr_t offset, unsigned long size, pgprot_t prot)
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{
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#ifdef CONFIG_29BIT
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phys_addr_t last_addr = offset + size - 1;
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/*
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* For P1 and P2 space this is trivial, as everything is already
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* mapped. Uncached access for P1 addresses are done through P2.
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* In the P3 case or for addresses outside of the 29-bit space,
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* mapping must be done by the PMB or by using page tables.
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*/
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if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) {
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u64 flags = pgprot_val(prot);
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/*
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* Anything using the legacy PTEA space attributes needs
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* to be kicked down to page table mappings.
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*/
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if (unlikely(flags & _PAGE_PCC_MASK))
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return NULL;
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if (unlikely(flags & _PAGE_CACHABLE))
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return (void __iomem *)P1SEGADDR(offset);
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return (void __iomem *)P2SEGADDR(offset);
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}
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/* P4 above the store queues are always mapped. */
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if (unlikely(offset >= P3_ADDR_MAX))
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return (void __iomem *)P4SEGADDR(offset);
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#endif
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return NULL;
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}
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static inline void __iomem *
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__ioremap_mode(phys_addr_t offset, unsigned long size, pgprot_t prot)
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{
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void __iomem *ret;
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ret = __ioremap_trapped(offset, size);
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if (ret)
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return ret;
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ret = __ioremap_29bit(offset, size, prot);
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if (ret)
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return ret;
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return __ioremap(offset, size, prot);
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}
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#else
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#define __ioremap(offset, size, prot) ((void __iomem *)(offset))
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#define __ioremap_mode(offset, size, prot) ((void __iomem *)(offset))
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static inline void iounmap(void __iomem *addr) {}
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#endif /* CONFIG_MMU */
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static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size)
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{
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return __ioremap_mode(offset, size, PAGE_KERNEL_NOCACHE);
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return __ioremap_caller(offset, size, PAGE_KERNEL_NOCACHE,
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__builtin_return_address(0));
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}
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static inline void __iomem *
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ioremap_cache(phys_addr_t offset, unsigned long size)
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{
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return __ioremap_mode(offset, size, PAGE_KERNEL);
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return __ioremap_caller(offset, size, PAGE_KERNEL,
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__builtin_return_address(0));
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}
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#define ioremap_cache ioremap_cache
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#ifdef CONFIG_HAVE_IOREMAP_PROT
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static inline void __iomem *
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ioremap_prot(phys_addr_t offset, unsigned long size, unsigned long flags)
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static inline void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,
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unsigned long flags)
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{
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return __ioremap_mode(offset, size, __pgprot(flags));
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return __ioremap_caller(offset, size, __pgprot(flags),
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__builtin_return_address(0));
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}
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#endif
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#endif /* CONFIG_HAVE_IOREMAP_PROT */
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#else /* CONFIG_MMU */
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#define iounmap(addr) do { } while (0)
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#define ioremap(offset, size) ((void __iomem *)(unsigned long)(offset))
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#endif /* CONFIG_MMU */
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#define ioremap_uc ioremap
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@ -26,6 +26,51 @@
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#include <asm/mmu.h>
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#include "ioremap.h"
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/*
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* On 32-bit SH, we traditionally have the whole physical address space mapped
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* at all times (as MIPS does), so "ioremap()" and "iounmap()" do not need to do
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* anything but place the address in the proper segment. This is true for P1
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* and P2 addresses, as well as some P3 ones. However, most of the P3 addresses
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* and newer cores using extended addressing need to map through page tables, so
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* the ioremap() implementation becomes a bit more complicated.
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*/
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#ifdef CONFIG_29BIT
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static void __iomem *
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__ioremap_29bit(phys_addr_t offset, unsigned long size, pgprot_t prot)
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{
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phys_addr_t last_addr = offset + size - 1;
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/*
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* For P1 and P2 space this is trivial, as everything is already
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* mapped. Uncached access for P1 addresses are done through P2.
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* In the P3 case or for addresses outside of the 29-bit space,
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* mapping must be done by the PMB or by using page tables.
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*/
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if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) {
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u64 flags = pgprot_val(prot);
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/*
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* Anything using the legacy PTEA space attributes needs
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* to be kicked down to page table mappings.
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*/
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if (unlikely(flags & _PAGE_PCC_MASK))
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return NULL;
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if (unlikely(flags & _PAGE_CACHABLE))
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return (void __iomem *)P1SEGADDR(offset);
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return (void __iomem *)P2SEGADDR(offset);
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}
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/* P4 above the store queues are always mapped. */
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if (unlikely(offset >= P3_ADDR_MAX))
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return (void __iomem *)P4SEGADDR(offset);
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return NULL;
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}
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#else
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#define __ioremap_29bit(offset, size, prot) NULL
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#endif /* CONFIG_29BIT */
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/*
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* Remap an arbitrary physical address space into the kernel virtual
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* address space. Needed when the kernel wants to access high addresses
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@ -43,6 +88,14 @@ __ioremap_caller(phys_addr_t phys_addr, unsigned long size,
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unsigned long offset, last_addr, addr, orig_addr;
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void __iomem *mapped;
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mapped = __ioremap_trapped(phys_addr, size);
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if (mapped)
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return mapped;
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mapped = __ioremap_29bit(phys_addr, size, pgprot);
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if (mapped)
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return mapped;
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/* Don't allow wraparound or zero size */
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last_addr = phys_addr + size - 1;
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if (!size || last_addr < phys_addr)
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