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[PATCH] 8xx PCMCIA: support for MPC885ADS and MPC866ADS
This adds PCMCIA support for both MPC885ADS and MPC866ADS. This is established not together with FADS, because 885 does not have io_block_mapping() for BCSR area. Also, some cleanups done both for 885ADS and MBX. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com> Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
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@ -9,6 +9,9 @@
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* <oliver.kurth@cyclades.de>
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* Further fixes, v2.6 kernel port
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* <marcelo.tosatti@cyclades.com>
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*
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* Some fixes, additions (C) 2005 Montavista Software, Inc.
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* <vbordug@ru.mvista.com>
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*
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* "The ExCA standard specifies that socket controllers should provide
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* two IO and five memory windows per socket, which can be independently
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@ -97,6 +100,11 @@ MODULE_LICENSE("Dual MPL/GPL");
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#endif
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#endif
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#if defined(CONFIG_MPC885ADS)
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#define CONFIG_PCMCIA_SLOT_A
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#define PCMCIA_GLITCHY_CD
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#endif
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/* Cyclades ACS uses both slots */
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#ifdef CONFIG_PRxK
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#define CONFIG_PCMCIA_SLOT_A
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@ -374,10 +382,10 @@ static int voltage_set(int slot, int vcc, int vpp)
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}
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/* first, turn off all power */
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out_be32(&((u32 *)BCSR1), in_be32(&((u32 *)BCSR1)) & ~(BCSR1_PCCVCC_MASK | BCSR1_PCCVPP_MASK));
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out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) & ~(BCSR1_PCCVCC_MASK | BCSR1_PCCVPP_MASK));
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/* enable new powersettings */
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out_be32(&((u32 *)BCSR1), in_be32(&((u32 *)BCSR1)) | reg);
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out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) | reg);
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return 0;
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}
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@ -386,12 +394,89 @@ static int voltage_set(int slot, int vcc, int vpp)
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static void hardware_enable(int slot)
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{
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out_be32(&((u32 *)BCSR1), in_be32(&((u32 *)BCSR1)) & ~BCSR1_PCCEN);
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out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) & ~BCSR1_PCCEN);
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}
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static void hardware_disable(int slot)
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{
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out_be32(&((u32 *)BCSR1), in_be32(&((u32 *)BCSR1)) | BCSR1_PCCEN);
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out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) | BCSR1_PCCEN);
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}
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#endif
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/* MPC885ADS Boards */
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#if defined(CONFIG_MPC885ADS)
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#define PCMCIA_BOARD_MSG "MPC885ADS"
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static int voltage_set(int slot, int vcc, int vpp)
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{
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u32 reg = 0;
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unsigned *bcsr_io;
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bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
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switch(vcc) {
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case 0:
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break;
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case 33:
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reg |= BCSR1_PCCVCC0;
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break;
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case 50:
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reg |= BCSR1_PCCVCC1;
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break;
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default:
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return 1;
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}
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switch(vpp) {
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case 0:
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break;
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case 33:
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case 50:
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if(vcc == vpp)
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reg |= BCSR1_PCCVPP1;
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else
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return 1;
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break;
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case 120:
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if ((vcc == 33) || (vcc == 50))
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reg |= BCSR1_PCCVPP0;
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else
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return 1;
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default:
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return 1;
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}
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/* first, turn off all power */
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out_be32(bcsr_io, in_be32(bcsr_io) & ~(BCSR1_PCCVCC_MASK | BCSR1_PCCVPP_MASK));
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/* enable new powersettings */
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out_be32(bcsr_io, in_be32(bcsr_io) | reg);
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iounmap(bcsr_io);
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return 0;
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}
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#define socket_get(_slot_) PCMCIA_SOCKET_KEY_5V
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static void hardware_enable(int slot)
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{
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unsigned *bcsr_io;
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bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
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out_be32(bcsr_io, in_be32(bcsr_io) & ~BCSR1_PCCEN);
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iounmap(bcsr_io);
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}
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static void hardware_disable(int slot)
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{
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unsigned *bcsr_io;
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bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
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out_be32(bcsr_io, in_be32(bcsr_io) | BCSR1_PCCEN);
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iounmap(bcsr_io);
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}
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#endif
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@ -440,10 +525,10 @@ static int voltage_set(int slot, int vcc, int vpp)
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}
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/* first, turn off all power */
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out_8(&((u8 *)MBX_CSR2_ADDR), in_8(&((u8 *)MBX_CSR2_ADDR)) & ~(CSR2_VCC_MASK | CSR2_VPP_MASK));
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out_8((u8 *)MBX_CSR2_ADDR, in_8((u8 *)MBX_CSR2_ADDR) & ~(CSR2_VCC_MASK | CSR2_VPP_MASK));
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/* enable new powersettings */
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out_8(&((u8 *)MBX_CSR2_ADDR), in_8(&((u8 *)MBX_CSR2_ADDR)) | reg);
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out_8((u8 *)MBX_CSR2_ADDR, in_8((u8 *)MBX_CSR2_ADDR) | reg);
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return 0;
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}
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