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arm64: dts: apple: t8103: Add PMGR nodes
This adds the two PMGR nodes and all known power state subnodes. Since there are a large number of them, let's put them in a separate file to include. Reviewed-by: Sven Peter <sven@svenpeter.dev> Signed-off-by: Hector Martin <marcan@marcan.st>
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arch/arm64/boot/dts/apple/t8103-pmgr.dtsi
Normal file
1136
arch/arm64/boot/dts/apple/t8103-pmgr.dtsi
Normal file
File diff suppressed because it is too large
Load Diff
@ -121,6 +121,7 @@
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pinctrl-names = "default";
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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power-domains = <&ps_i2c0>;
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};
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i2c1: i2c@235014000 {
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@ -133,6 +134,7 @@
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pinctrl-names = "default";
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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power-domains = <&ps_i2c1>;
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};
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i2c2: i2c@235018000 {
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@ -146,6 +148,7 @@
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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status = "disabled"; /* not used in all devices */
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power-domains = <&ps_i2c2>;
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};
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i2c3: i2c@23501c000 {
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@ -158,6 +161,7 @@
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pinctrl-names = "default";
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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power-domains = <&ps_i2c3>;
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};
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i2c4: i2c@235020000 {
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@ -170,6 +174,7 @@
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pinctrl-names = "default";
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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power-domains = <&ps_i2c4>;
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status = "disabled"; /* only used in J293 */
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};
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@ -185,6 +190,7 @@
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*/
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clocks = <&clk24>, <&clk24>;
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clock-names = "uart", "clk_uart_baud0";
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power-domains = <&ps_uart0>;
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status = "disabled";
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};
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@ -193,11 +199,20 @@
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0x2 0x3b100000 0x0 0x8000>;
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power-domains = <&ps_aic>;
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};
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pmgr: power-management@23b700000 {
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compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x2 0x3b700000 0 0x14000>;
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};
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pinctrl_ap: pinctrl@23c100000 {
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compatible = "apple,t8103-pinctrl", "apple,pinctrl";
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reg = <0x2 0x3c100000 0x0 0x100000>;
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power-domains = <&ps_gpio>;
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gpio-controller;
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#gpio-cells = <2>;
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@ -247,6 +262,13 @@
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};
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};
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pmgr_mini: power-management@23d280000 {
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compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x2 0x3d280000 0 0x4000>;
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};
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pinctrl_aop: pinctrl@24a820000 {
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compatible = "apple,t8103-pinctrl", "apple,pinctrl";
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reg = <0x2 0x4a820000 0x0 0x4000>;
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@ -271,6 +293,7 @@
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pinctrl_nub: pinctrl@23d1f0000 {
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compatible = "apple,t8103-pinctrl", "apple,pinctrl";
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reg = <0x2 0x3d1f0000 0x0 0x4000>;
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power-domains = <&ps_nub_gpio>;
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gpio-controller;
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#gpio-cells = <2>;
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@ -316,6 +339,7 @@
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#iommu-cells = <1>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 696 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&ps_apcie_gp>;
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};
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pcie0_dart_1: dart@682008000 {
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@ -324,6 +348,7 @@
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#iommu-cells = <1>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&ps_apcie_gp>;
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};
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pcie0_dart_2: dart@683008000 {
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@ -332,6 +357,7 @@
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#iommu-cells = <1>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&ps_apcie_gp>;
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};
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pcie0: pcie@690000000 {
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@ -366,6 +392,7 @@
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ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>,
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<0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>;
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power-domains = <&ps_apcie_gp>;
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pinctrl-0 = <&pcie_pins>;
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pinctrl-names = "default";
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@ -431,3 +458,5 @@
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};
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};
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};
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#include "t8103-pmgr.dtsi"
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