mirror of
https://github.com/torvalds/linux.git
synced 2024-11-12 07:01:57 +00:00
Merge git://git.infradead.org/~kmpark/onenand-mtd-2.6
This commit is contained in:
commit
103e40f633
@ -61,6 +61,7 @@ static int __devinit generic_onenand_probe(struct device *dev)
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}
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info->onenand.mmcontrol = pdata->mmcontrol;
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info->onenand.irq = platform_get_irq(pdev, 0);
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info->mtd.name = pdev->dev.bus_id;
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info->mtd.priv = &info->onenand;
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@ -13,6 +13,7 @@
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/jiffies.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/onenand.h>
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@ -330,15 +331,123 @@ static int onenand_wait(struct mtd_info *mtd, int state)
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if (interrupt & ONENAND_INT_READ) {
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ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
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if (ecc & ONENAND_ECC_2BIT_ALL) {
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if (ecc) {
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DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
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return -EBADMSG;
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if (ecc & ONENAND_ECC_2BIT_ALL)
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mtd->ecc_stats.failed++;
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else if (ecc & ONENAND_ECC_1BIT_ALL)
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mtd->ecc_stats.corrected++;
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}
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}
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return 0;
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}
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/*
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* onenand_interrupt - [DEFAULT] onenand interrupt handler
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* @param irq onenand interrupt number
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* @param dev_id interrupt data
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*
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* complete the work
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*/
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static irqreturn_t onenand_interrupt(int irq, void *data)
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{
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struct onenand_chip *this = (struct onenand_chip *) data;
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/* To handle shared interrupt */
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if (!this->complete.done)
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complete(&this->complete);
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return IRQ_HANDLED;
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}
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/*
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* onenand_interrupt_wait - [DEFAULT] wait until the command is done
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* @param mtd MTD device structure
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* @param state state to select the max. timeout value
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*
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* Wait for command done.
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*/
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static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
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{
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struct onenand_chip *this = mtd->priv;
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/* To prevent soft lockup */
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touch_softlockup_watchdog();
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wait_for_completion(&this->complete);
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return onenand_wait(mtd, state);
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}
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/*
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* onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
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* @param mtd MTD device structure
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* @param state state to select the max. timeout value
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*
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* Try interrupt based wait (It is used one-time)
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*/
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static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
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{
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struct onenand_chip *this = mtd->priv;
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unsigned long remain, timeout;
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/* We use interrupt wait first */
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this->wait = onenand_interrupt_wait;
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/* To prevent soft lockup */
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touch_softlockup_watchdog();
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timeout = msecs_to_jiffies(100);
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remain = wait_for_completion_timeout(&this->complete, timeout);
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if (!remain) {
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printk(KERN_INFO "OneNAND: There's no interrupt. "
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"We use the normal wait\n");
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/* Release the irq */
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free_irq(this->irq, this);
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this->wait = onenand_wait;
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}
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return onenand_wait(mtd, state);
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}
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/*
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* onenand_setup_wait - [OneNAND Interface] setup onenand wait method
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* @param mtd MTD device structure
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*
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* There's two method to wait onenand work
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* 1. polling - read interrupt status register
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* 2. interrupt - use the kernel interrupt method
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*/
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static void onenand_setup_wait(struct mtd_info *mtd)
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{
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struct onenand_chip *this = mtd->priv;
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int syscfg;
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init_completion(&this->complete);
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if (this->irq <= 0) {
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this->wait = onenand_wait;
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return;
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}
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if (request_irq(this->irq, &onenand_interrupt,
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IRQF_SHARED, "onenand", this)) {
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/* If we can't get irq, use the normal wait */
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this->wait = onenand_wait;
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return;
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}
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/* Enable interrupt */
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syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
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syscfg |= ONENAND_SYS_CFG1_IOBE;
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this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
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this->wait = onenand_try_interrupt_wait;
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}
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/**
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* onenand_bufferram_offset - [DEFAULT] BufferRAM offset
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* @param mtd MTD data structure
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@ -609,6 +718,7 @@ static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
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size_t *retlen, u_char *buf)
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{
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struct onenand_chip *this = mtd->priv;
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struct mtd_ecc_stats stats;
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int read = 0, column;
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int thislen;
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int ret = 0;
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@ -627,6 +737,7 @@ static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
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/* TODO handling oob */
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stats = mtd->ecc_stats;
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while (read < len) {
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thislen = min_t(int, mtd->writesize, len - read);
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@ -668,7 +779,11 @@ out:
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* retlen == desired len and result == -EBADMSG
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*/
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*retlen = read;
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return ret;
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if (mtd->ecc_stats.failed - stats.failed)
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return -EBADMSG;
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return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
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}
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/**
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@ -1129,7 +1244,6 @@ static void onenand_sync(struct mtd_info *mtd)
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onenand_release_device(mtd);
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}
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/**
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* onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
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* @param mtd MTD device structure
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@ -1196,32 +1310,38 @@ static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
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}
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/**
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* onenand_unlock - [MTD Interface] Unlock block(s)
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* onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
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* @param mtd MTD device structure
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* @param ofs offset relative to mtd start
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* @param len number of bytes to unlock
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* @param len number of bytes to lock or unlock
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*
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* Unlock one or more blocks
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* Lock or unlock one or more blocks
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*/
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static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
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static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
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{
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struct onenand_chip *this = mtd->priv;
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int start, end, block, value, status;
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int wp_status_mask;
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start = ofs >> this->erase_shift;
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end = len >> this->erase_shift;
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if (cmd == ONENAND_CMD_LOCK)
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wp_status_mask = ONENAND_WP_LS;
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else
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wp_status_mask = ONENAND_WP_US;
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/* Continuous lock scheme */
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if (this->options & ONENAND_HAS_CONT_LOCK) {
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/* Set start block address */
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this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
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/* Set end block address */
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this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
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/* Write unlock command */
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this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
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/* Write lock command */
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this->command(mtd, cmd, 0, 0);
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/* There's no return value */
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this->wait(mtd, FL_UNLOCKING);
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this->wait(mtd, FL_LOCKING);
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/* Sanity check */
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while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
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@ -1230,7 +1350,7 @@ static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
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/* Check lock status */
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status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
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if (!(status & ONENAND_WP_US))
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if (!(status & wp_status_mask))
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printk(KERN_ERR "wp status = 0x%x\n", status);
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return 0;
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@ -1246,11 +1366,11 @@ static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
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this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
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/* Set start block address */
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this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
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/* Write unlock command */
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this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
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/* Write lock command */
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this->command(mtd, cmd, 0, 0);
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/* There's no return value */
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this->wait(mtd, FL_UNLOCKING);
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this->wait(mtd, FL_LOCKING);
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/* Sanity check */
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while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
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@ -1259,13 +1379,39 @@ static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
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/* Check lock status */
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status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
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if (!(status & ONENAND_WP_US))
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if (!(status & wp_status_mask))
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printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
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}
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return 0;
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}
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/**
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* onenand_lock - [MTD Interface] Lock block(s)
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* @param mtd MTD device structure
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* @param ofs offset relative to mtd start
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* @param len number of bytes to unlock
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*
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* Lock one or more blocks
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*/
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static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
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{
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return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
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}
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/**
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* onenand_unlock - [MTD Interface] Unlock block(s)
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* @param mtd MTD device structure
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* @param ofs offset relative to mtd start
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* @param len number of bytes to unlock
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*
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* Unlock one or more blocks
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*/
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static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
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{
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return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
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}
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/**
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* onenand_check_lock_status - [OneNAND Interface] Check lock status
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* @param this onenand chip data structure
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@ -1310,7 +1456,7 @@ static int onenand_unlock_all(struct mtd_info *mtd)
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this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
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/* There's no return value */
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this->wait(mtd, FL_UNLOCKING);
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this->wait(mtd, FL_LOCKING);
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/* Sanity check */
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while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
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@ -1334,7 +1480,7 @@ static int onenand_unlock_all(struct mtd_info *mtd)
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return 0;
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}
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mtd->unlock(mtd, 0x0, this->chipsize);
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onenand_unlock(mtd, 0x0, this->chipsize);
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return 0;
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}
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@ -1762,7 +1908,7 @@ static int onenand_probe(struct mtd_info *mtd)
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/* Read manufacturer and device IDs from Register */
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maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
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dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
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ver_id= this->read_word(this->base + ONENAND_REG_VERSION_ID);
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ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
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/* Check OneNAND device */
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if (maf_id != bram_maf_id || dev_id != bram_dev_id)
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@ -1846,7 +1992,7 @@ int onenand_scan(struct mtd_info *mtd, int maxchips)
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if (!this->command)
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this->command = onenand_command;
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if (!this->wait)
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this->wait = onenand_wait;
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onenand_setup_wait(mtd);
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if (!this->read_bufferram)
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this->read_bufferram = onenand_read_bufferram;
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@ -1922,7 +2068,7 @@ int onenand_scan(struct mtd_info *mtd, int maxchips)
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mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
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#endif
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mtd->sync = onenand_sync;
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mtd->lock = NULL;
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mtd->lock = onenand_lock;
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mtd->unlock = onenand_unlock;
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mtd->suspend = onenand_suspend;
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mtd->resume = onenand_resume;
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@ -100,6 +100,7 @@ static int create_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr
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bbm->bbt[i >> 3] |= 0x03 << (i & 0x6);
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printk(KERN_WARNING "Bad eraseblock %d at 0x%08x\n",
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i >> 1, (unsigned int) from);
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mtd->ecc_stats.badblocks++;
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break;
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}
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}
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@ -13,6 +13,7 @@
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#define __LINUX_MTD_ONENAND_H
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#include <linux/spinlock.h>
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#include <linux/completion.h>
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#include <linux/mtd/onenand_regs.h>
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#include <linux/mtd/bbm.h>
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@ -33,7 +34,6 @@ typedef enum {
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FL_WRITING,
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FL_ERASING,
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FL_SYNCING,
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FL_UNLOCKING,
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FL_LOCKING,
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FL_RESETING,
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FL_OTPING,
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@ -120,6 +120,9 @@ struct onenand_chip {
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int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
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int (*scan_bbt)(struct mtd_info *mtd);
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struct completion complete;
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int irq;
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spinlock_t chip_lock;
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wait_queue_head_t wq;
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onenand_state_t state;
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@ -179,6 +179,7 @@
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* ECC Status Reigser FF00h (R)
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*/
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#define ONENAND_ECC_1BIT (1 << 0)
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#define ONENAND_ECC_1BIT_ALL (0x5555)
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#define ONENAND_ECC_2BIT (1 << 1)
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#define ONENAND_ECC_2BIT_ALL (0xAAAA)
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