From 6eb583da959cf751eb951cc5ff488dd4e41f1b2f Mon Sep 17 00:00:00 2001 From: Sivaram Nair Date: Tue, 20 Nov 2012 09:29:16 +0200 Subject: [PATCH 1/3] ARM: tegra: select correct parent clk for pll_p For Tegra30, pll_p clk's parent is wrongly specified as clk_m instead of pll_ref in the tegra30_clk_init_table and this is resulting in a boot-time warning. This patch fixes this by correcting the clk init table. Signed-off-by: Sivaram Nair Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 0b0a5f556d34..988549a77b69 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -102,7 +102,7 @@ static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = { static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = { /* name parent rate enabled */ { "clk_m", NULL, 0, true }, - { "pll_p", "clk_m", 408000000, true }, + { "pll_p", "pll_ref", 408000000, true }, { "pll_p_out1", "pll_p", 9600000, true }, { NULL, NULL, 0, 0}, }; From 6e25e1b178ee3caf34f229bacfad5ae6780bcec6 Mon Sep 17 00:00:00 2001 From: Sivaram Nair Date: Wed, 21 Nov 2012 13:42:27 +0200 Subject: [PATCH 2/3] ARM: tegra: fix comment in dsib clk set_parent Since the clk framework has already taken necessary locks before calling into the arch clk ops code, no further locks are needed while setting the parent of dsib clk. This patch removes a comment that indicated otherwise, and yet did not take any locks. Signed-off-by: Sivaram Nair Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/tegra30_clocks.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arm/mach-tegra/tegra30_clocks.c b/arch/arm/mach-tegra/tegra30_clocks.c index e9de5dfd94ec..c2102a312bc5 100644 --- a/arch/arm/mach-tegra/tegra30_clocks.c +++ b/arch/arm/mach-tegra/tegra30_clocks.c @@ -1913,9 +1913,7 @@ struct clk_ops tegra30_periph_clk_ops = { static int tegra30_dsib_clk_set_parent(struct clk_hw *hw, u8 index) { struct clk *d = clk_get_sys(NULL, "pll_d"); - /* The DSIB parent selection bit is in PLLD base - register - can not do direct r-m-w, must be - protected by PLLD lock */ + /* The DSIB parent selection bit is in PLLD base register */ tegra_clk_cfg_ex( d, TEGRA_CLK_PLLD_MIPI_MUX_SEL, index); From f110174910896b7a7d91c0c60d19136815f68c54 Mon Sep 17 00:00:00 2001 From: Hiroshi Doyu Date: Wed, 21 Nov 2012 14:41:37 +0200 Subject: [PATCH 3/3] amba: tegra-ahb: Fix warning w/o PM_SLEEP Fix build warning w/o PM_SLEEP. Signed-off-by: Hiroshi Doyu Signed-off-by: Stephen Warren --- drivers/amba/tegra-ahb.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/amba/tegra-ahb.c b/drivers/amba/tegra-ahb.c index 0b6f0b28a487..ce8fdadf3696 100644 --- a/drivers/amba/tegra-ahb.c +++ b/drivers/amba/tegra-ahb.c @@ -156,6 +156,7 @@ int tegra_ahb_enable_smmu(struct device_node *dn) EXPORT_SYMBOL(tegra_ahb_enable_smmu); #endif +#ifdef CONFIG_PM_SLEEP static int tegra_ahb_suspend(struct device *dev) { int i; @@ -175,6 +176,7 @@ static int tegra_ahb_resume(struct device *dev) gizmo_writel(ahb, ahb->ctx[i], tegra_ahb_gizmo[i]); return 0; } +#endif static UNIVERSAL_DEV_PM_OPS(tegra_ahb_pm, tegra_ahb_suspend,