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rdma/siw: iWarp wire packet format
Broken up commit to add the Soft iWarp RDMA driver. Signed-off-by: Bernard Metzler <bmt@zurich.ibm.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
This commit is contained in:
Bernard Metzler
Jason Gunthorpe
parent
09fbca8e62
commit
0e935ae6af
380
drivers/infiniband/sw/siw/iwarp.h
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380
drivers/infiniband/sw/siw/iwarp.h
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@ -0,0 +1,380 @@
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/* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */
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/* Authors: Bernard Metzler <bmt@zurich.ibm.com> */
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/* Copyright (c) 2008-2019, IBM Corporation */
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#ifndef _IWARP_H
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#define _IWARP_H
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#include <rdma/rdma_user_cm.h> /* RDMA_MAX_PRIVATE_DATA */
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#include <linux/types.h>
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#include <asm/byteorder.h>
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#define RDMAP_VERSION 1
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#define DDP_VERSION 1
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#define MPA_REVISION_1 1
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#define MPA_REVISION_2 2
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#define MPA_MAX_PRIVDATA RDMA_MAX_PRIVATE_DATA
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#define MPA_KEY_REQ "MPA ID Req Frame"
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#define MPA_KEY_REP "MPA ID Rep Frame"
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#define MPA_IRD_ORD_MASK 0x3fff
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struct mpa_rr_params {
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__be16 bits;
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__be16 pd_len;
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};
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/*
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* MPA request/response header bits & fields
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*/
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enum {
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MPA_RR_FLAG_MARKERS = cpu_to_be16(0x8000),
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MPA_RR_FLAG_CRC = cpu_to_be16(0x4000),
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MPA_RR_FLAG_REJECT = cpu_to_be16(0x2000),
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MPA_RR_FLAG_ENHANCED = cpu_to_be16(0x1000),
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MPA_RR_FLAG_GSO_EXP = cpu_to_be16(0x0800),
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MPA_RR_MASK_REVISION = cpu_to_be16(0x00ff)
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};
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/*
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* MPA request/reply header
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*/
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struct mpa_rr {
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__u8 key[16];
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struct mpa_rr_params params;
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};
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static inline void __mpa_rr_set_revision(__be16 *bits, u8 rev)
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{
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*bits = (*bits & ~MPA_RR_MASK_REVISION) |
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(cpu_to_be16(rev) & MPA_RR_MASK_REVISION);
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}
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static inline u8 __mpa_rr_revision(__be16 mpa_rr_bits)
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{
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__be16 rev = mpa_rr_bits & MPA_RR_MASK_REVISION;
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return be16_to_cpu(rev);
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}
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enum mpa_v2_ctrl {
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MPA_V2_PEER_TO_PEER = cpu_to_be16(0x8000),
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MPA_V2_ZERO_LENGTH_RTR = cpu_to_be16(0x4000),
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MPA_V2_RDMA_WRITE_RTR = cpu_to_be16(0x8000),
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MPA_V2_RDMA_READ_RTR = cpu_to_be16(0x4000),
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MPA_V2_RDMA_NO_RTR = cpu_to_be16(0x0000),
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MPA_V2_MASK_IRD_ORD = cpu_to_be16(0x3fff)
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};
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struct mpa_v2_data {
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__be16 ird;
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__be16 ord;
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};
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struct mpa_marker {
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__be16 rsvd;
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__be16 fpdu_hmd; /* FPDU header-marker distance (= MPA's FPDUPTR) */
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};
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/*
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* maximum MPA trailer
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*/
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struct mpa_trailer {
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__u8 pad[4];
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__be32 crc;
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};
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#define MPA_HDR_SIZE 2
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#define MPA_CRC_SIZE 4
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/*
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* Common portion of iWARP headers (MPA, DDP, RDMAP)
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* for any FPDU
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*/
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struct iwarp_ctrl {
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__be16 mpa_len;
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__be16 ddp_rdmap_ctrl;
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};
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/*
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* DDP/RDMAP Hdr bits & fields
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*/
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enum {
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DDP_FLAG_TAGGED = cpu_to_be16(0x8000),
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DDP_FLAG_LAST = cpu_to_be16(0x4000),
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DDP_MASK_RESERVED = cpu_to_be16(0x3C00),
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DDP_MASK_VERSION = cpu_to_be16(0x0300),
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RDMAP_MASK_VERSION = cpu_to_be16(0x00C0),
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RDMAP_MASK_RESERVED = cpu_to_be16(0x0030),
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RDMAP_MASK_OPCODE = cpu_to_be16(0x000f)
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};
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static inline u8 __ddp_get_version(struct iwarp_ctrl *ctrl)
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{
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return be16_to_cpu(ctrl->ddp_rdmap_ctrl & DDP_MASK_VERSION) >> 8;
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}
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static inline void __ddp_set_version(struct iwarp_ctrl *ctrl, u8 version)
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{
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ctrl->ddp_rdmap_ctrl =
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(ctrl->ddp_rdmap_ctrl & ~DDP_MASK_VERSION) |
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(cpu_to_be16((u16)version << 8) & DDP_MASK_VERSION);
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}
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static inline u8 __rdmap_get_version(struct iwarp_ctrl *ctrl)
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{
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__be16 ver = ctrl->ddp_rdmap_ctrl & RDMAP_MASK_VERSION;
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return be16_to_cpu(ver) >> 6;
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}
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static inline void __rdmap_set_version(struct iwarp_ctrl *ctrl, u8 version)
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{
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ctrl->ddp_rdmap_ctrl = (ctrl->ddp_rdmap_ctrl & ~RDMAP_MASK_VERSION) |
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(cpu_to_be16(version << 6) & RDMAP_MASK_VERSION);
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}
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static inline u8 __rdmap_get_opcode(struct iwarp_ctrl *ctrl)
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{
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return be16_to_cpu(ctrl->ddp_rdmap_ctrl & RDMAP_MASK_OPCODE);
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}
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static inline void __rdmap_set_opcode(struct iwarp_ctrl *ctrl, u8 opcode)
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{
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ctrl->ddp_rdmap_ctrl = (ctrl->ddp_rdmap_ctrl & ~RDMAP_MASK_OPCODE) |
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(cpu_to_be16(opcode) & RDMAP_MASK_OPCODE);
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}
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struct iwarp_rdma_write {
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struct iwarp_ctrl ctrl;
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__be32 sink_stag;
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__be64 sink_to;
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};
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struct iwarp_rdma_rreq {
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struct iwarp_ctrl ctrl;
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__be32 rsvd;
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__be32 ddp_qn;
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__be32 ddp_msn;
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__be32 ddp_mo;
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__be32 sink_stag;
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__be64 sink_to;
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__be32 read_size;
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__be32 source_stag;
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__be64 source_to;
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};
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struct iwarp_rdma_rresp {
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struct iwarp_ctrl ctrl;
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__be32 sink_stag;
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__be64 sink_to;
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};
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struct iwarp_send {
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struct iwarp_ctrl ctrl;
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__be32 rsvd;
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__be32 ddp_qn;
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__be32 ddp_msn;
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__be32 ddp_mo;
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};
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struct iwarp_send_inv {
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struct iwarp_ctrl ctrl;
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__be32 inval_stag;
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__be32 ddp_qn;
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__be32 ddp_msn;
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__be32 ddp_mo;
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};
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struct iwarp_terminate {
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struct iwarp_ctrl ctrl;
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__be32 rsvd;
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__be32 ddp_qn;
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__be32 ddp_msn;
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__be32 ddp_mo;
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#if defined(__LITTLE_ENDIAN_BITFIELD)
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__be32 layer : 4;
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__be32 etype : 4;
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__be32 ecode : 8;
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__be32 flag_m : 1;
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__be32 flag_d : 1;
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__be32 flag_r : 1;
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__be32 reserved : 13;
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#elif defined(__BIG_ENDIAN_BITFIELD)
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__be32 reserved : 13;
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__be32 flag_r : 1;
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__be32 flag_d : 1;
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__be32 flag_m : 1;
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__be32 ecode : 8;
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__be32 etype : 4;
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__be32 layer : 4;
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#else
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#error "undefined byte order"
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#endif
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};
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/*
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* Terminate Hdr bits & fields
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*/
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enum {
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TERM_MASK_LAYER = cpu_to_be32(0xf0000000),
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TERM_MASK_ETYPE = cpu_to_be32(0x0f000000),
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TERM_MASK_ECODE = cpu_to_be32(0x00ff0000),
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TERM_FLAG_M = cpu_to_be32(0x00008000),
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TERM_FLAG_D = cpu_to_be32(0x00004000),
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TERM_FLAG_R = cpu_to_be32(0x00002000),
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TERM_MASK_RESVD = cpu_to_be32(0x00001fff)
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};
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static inline u8 __rdmap_term_layer(struct iwarp_terminate *term)
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{
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return term->layer;
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}
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static inline void __rdmap_term_set_layer(struct iwarp_terminate *term,
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u8 layer)
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{
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term->layer = layer & 0xf;
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}
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static inline u8 __rdmap_term_etype(struct iwarp_terminate *term)
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{
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return term->etype;
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}
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static inline void __rdmap_term_set_etype(struct iwarp_terminate *term,
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u8 etype)
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{
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term->etype = etype & 0xf;
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}
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static inline u8 __rdmap_term_ecode(struct iwarp_terminate *term)
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{
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return term->ecode;
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}
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static inline void __rdmap_term_set_ecode(struct iwarp_terminate *term,
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u8 ecode)
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{
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term->ecode = ecode;
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}
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/*
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* Common portion of iWARP headers (MPA, DDP, RDMAP)
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* for an FPDU carrying an untagged DDP segment
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*/
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struct iwarp_ctrl_untagged {
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struct iwarp_ctrl ctrl;
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__be32 rsvd;
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__be32 ddp_qn;
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__be32 ddp_msn;
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__be32 ddp_mo;
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};
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/*
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* Common portion of iWARP headers (MPA, DDP, RDMAP)
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* for an FPDU carrying a tagged DDP segment
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*/
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struct iwarp_ctrl_tagged {
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struct iwarp_ctrl ctrl;
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__be32 ddp_stag;
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__be64 ddp_to;
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};
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union iwarp_hdr {
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struct iwarp_ctrl ctrl;
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struct iwarp_ctrl_untagged c_untagged;
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struct iwarp_ctrl_tagged c_tagged;
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struct iwarp_rdma_write rwrite;
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struct iwarp_rdma_rreq rreq;
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struct iwarp_rdma_rresp rresp;
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struct iwarp_terminate terminate;
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struct iwarp_send send;
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struct iwarp_send_inv send_inv;
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};
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enum term_elayer {
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TERM_ERROR_LAYER_RDMAP = 0x00,
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TERM_ERROR_LAYER_DDP = 0x01,
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TERM_ERROR_LAYER_LLP = 0x02 /* eg., MPA */
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};
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enum ddp_etype {
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DDP_ETYPE_CATASTROPHIC = 0x0,
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DDP_ETYPE_TAGGED_BUF = 0x1,
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DDP_ETYPE_UNTAGGED_BUF = 0x2,
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DDP_ETYPE_RSVD = 0x3
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};
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enum ddp_ecode {
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/* unspecified, set to zero */
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DDP_ECODE_CATASTROPHIC = 0x00,
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/* Tagged Buffer Errors */
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DDP_ECODE_T_INVALID_STAG = 0x00,
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DDP_ECODE_T_BASE_BOUNDS = 0x01,
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DDP_ECODE_T_STAG_NOT_ASSOC = 0x02,
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DDP_ECODE_T_TO_WRAP = 0x03,
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DDP_ECODE_T_VERSION = 0x04,
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/* Untagged Buffer Errors */
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DDP_ECODE_UT_INVALID_QN = 0x01,
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DDP_ECODE_UT_INVALID_MSN_NOBUF = 0x02,
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DDP_ECODE_UT_INVALID_MSN_RANGE = 0x03,
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DDP_ECODE_UT_INVALID_MO = 0x04,
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DDP_ECODE_UT_MSG_TOOLONG = 0x05,
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DDP_ECODE_UT_VERSION = 0x06
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};
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enum rdmap_untagged_qn {
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RDMAP_UNTAGGED_QN_SEND = 0,
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RDMAP_UNTAGGED_QN_RDMA_READ = 1,
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RDMAP_UNTAGGED_QN_TERMINATE = 2,
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RDMAP_UNTAGGED_QN_COUNT = 3
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};
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enum rdmap_etype {
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RDMAP_ETYPE_CATASTROPHIC = 0x0,
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RDMAP_ETYPE_REMOTE_PROTECTION = 0x1,
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RDMAP_ETYPE_REMOTE_OPERATION = 0x2
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};
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enum rdmap_ecode {
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RDMAP_ECODE_INVALID_STAG = 0x00,
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RDMAP_ECODE_BASE_BOUNDS = 0x01,
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RDMAP_ECODE_ACCESS_RIGHTS = 0x02,
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RDMAP_ECODE_STAG_NOT_ASSOC = 0x03,
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RDMAP_ECODE_TO_WRAP = 0x04,
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RDMAP_ECODE_VERSION = 0x05,
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RDMAP_ECODE_OPCODE = 0x06,
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RDMAP_ECODE_CATASTROPHIC_STREAM = 0x07,
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RDMAP_ECODE_CATASTROPHIC_GLOBAL = 0x08,
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RDMAP_ECODE_CANNOT_INVALIDATE = 0x09,
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RDMAP_ECODE_UNSPECIFIED = 0xff
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};
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enum llp_ecode {
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LLP_ECODE_TCP_STREAM_LOST = 0x01, /* How to transfer this ?? */
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LLP_ECODE_RECEIVED_CRC = 0x02,
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LLP_ECODE_FPDU_START = 0x03,
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LLP_ECODE_INVALID_REQ_RESP = 0x04,
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/* Errors for Enhanced Connection Establishment only */
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LLP_ECODE_LOCAL_CATASTROPHIC = 0x05,
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LLP_ECODE_INSUFFICIENT_IRD = 0x06,
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LLP_ECODE_NO_MATCHING_RTR = 0x07
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};
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enum llp_etype { LLP_ETYPE_MPA = 0x00 };
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enum rdma_opcode {
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RDMAP_RDMA_WRITE = 0x0,
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RDMAP_RDMA_READ_REQ = 0x1,
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RDMAP_RDMA_READ_RESP = 0x2,
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RDMAP_SEND = 0x3,
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RDMAP_SEND_INVAL = 0x4,
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RDMAP_SEND_SE = 0x5,
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RDMAP_SEND_SE_INVAL = 0x6,
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RDMAP_TERMINATE = 0x7,
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RDMAP_NOT_SUPPORTED = RDMAP_TERMINATE + 1
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};
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#endif
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