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can: flexcan: fix endianess detection
In commit88462d2a78
("can: flexcan: Remodel FlexCAN register r/w APIs for big endian FlexCAN controllers.") the following logic was implemented: if the dt property "big-endian" is given or the device is compatible to "fsl,p1010-flexcan": use big-endian mode; else use little-endian mode; This relies on commitd50f4630c2
("arm: dts: Remove p1010-flexcan compatible from imx series dts") which was applied a few commits later. Without this commit (or an old device tree used for booting a new kernel) the flexcan devices on i.MX25, i.MX28, i.MX35 and i.MX53 match the 'the device is compatible to "fsl,p1010-flexcan"' test and so are switched erroneously to big endian mode. Instead of the check above put a quirk in devtype data and rely on of_match_device yielding the most compatible match Fixes:88462d2a78
("can: flexcan: Remodel FlexCAN register r/w APIs for big endian FlexCAN controllers.") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Tested-by: Gavin Schenk <g.schenk@eckelmann.de> Cc: linux-stable <stable@vger.kernel.org> # >= v4.16 Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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@ -200,6 +200,7 @@
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#define FLEXCAN_QUIRK_DISABLE_MECR BIT(4) /* Disable Memory error detection */
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#define FLEXCAN_QUIRK_USE_OFF_TIMESTAMP BIT(5) /* Use timestamp based offloading */
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#define FLEXCAN_QUIRK_BROKEN_PERR_STATE BIT(6) /* No interrupt for error passive */
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#define FLEXCAN_QUIRK_DEFAULT_BIG_ENDIAN BIT(7) /* default to BE register access */
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/* Structure of the message buffer */
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struct flexcan_mb {
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@ -287,6 +288,12 @@ struct flexcan_priv {
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};
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static const struct flexcan_devtype_data fsl_p1010_devtype_data = {
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.quirks = FLEXCAN_QUIRK_BROKEN_WERR_STATE |
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FLEXCAN_QUIRK_BROKEN_PERR_STATE |
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FLEXCAN_QUIRK_DEFAULT_BIG_ENDIAN,
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};
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static const struct flexcan_devtype_data fsl_imx25_devtype_data = {
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.quirks = FLEXCAN_QUIRK_BROKEN_WERR_STATE |
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FLEXCAN_QUIRK_BROKEN_PERR_STATE,
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};
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@ -1251,9 +1258,9 @@ static void unregister_flexcandev(struct net_device *dev)
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static const struct of_device_id flexcan_of_match[] = {
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{ .compatible = "fsl,imx6q-flexcan", .data = &fsl_imx6q_devtype_data, },
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{ .compatible = "fsl,imx28-flexcan", .data = &fsl_imx28_devtype_data, },
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{ .compatible = "fsl,imx53-flexcan", .data = &fsl_p1010_devtype_data, },
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{ .compatible = "fsl,imx35-flexcan", .data = &fsl_p1010_devtype_data, },
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{ .compatible = "fsl,imx25-flexcan", .data = &fsl_p1010_devtype_data, },
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{ .compatible = "fsl,imx53-flexcan", .data = &fsl_imx25_devtype_data, },
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{ .compatible = "fsl,imx35-flexcan", .data = &fsl_imx25_devtype_data, },
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{ .compatible = "fsl,imx25-flexcan", .data = &fsl_imx25_devtype_data, },
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{ .compatible = "fsl,p1010-flexcan", .data = &fsl_p1010_devtype_data, },
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{ .compatible = "fsl,vf610-flexcan", .data = &fsl_vf610_devtype_data, },
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{ .compatible = "fsl,ls1021ar2-flexcan", .data = &fsl_ls1021a_r2_devtype_data, },
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@ -1337,18 +1344,13 @@ static int flexcan_probe(struct platform_device *pdev)
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priv = netdev_priv(dev);
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if (of_property_read_bool(pdev->dev.of_node, "big-endian")) {
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if (of_property_read_bool(pdev->dev.of_node, "big-endian") ||
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devtype_data->quirks & FLEXCAN_QUIRK_DEFAULT_BIG_ENDIAN) {
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priv->read = flexcan_read_be;
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priv->write = flexcan_write_be;
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} else {
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if (of_device_is_compatible(pdev->dev.of_node,
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"fsl,p1010-flexcan")) {
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priv->read = flexcan_read_be;
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priv->write = flexcan_write_be;
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} else {
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priv->read = flexcan_read_le;
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priv->write = flexcan_write_le;
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}
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priv->read = flexcan_read_le;
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priv->write = flexcan_write_le;
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}
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priv->can.clock.freq = clock_freq;
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