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i.MX fixes for 6.1, 2nd round:

Browse Source 
- Switch to usb-role-switch for fixing USB device mode on
   tqma8mqml-mba8mx board, so that Dual Role is fully functional.
 - A series from Marek Vasut to fix dt-schema warning caused by NAND
   controller size-cells.
 - Fix file permission of imx93-pinfunc header.
 - Enable OCOTP clock in soc-imx8m driver to fix a kexec kernel hang
   issue.
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Merge tag 'imx-fixes-6.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 6.1, 2nd round:

- Switch to usb-role-switch for fixing USB device mode on
  tqma8mqml-mba8mx board, so that Dual Role is fully functional.
- A series from Marek Vasut to fix dt-schema warning caused by NAND
  controller size-cells.
- Fix file permission of imx93-pinfunc header.
- Enable OCOTP clock in soc-imx8m driver to fix a kexec kernel hang
  issue.

* tag 'imx-fixes-6.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx8m: Enable OCOTP clock before reading the register
  arm64: dts: imx93-pinfunc: drop execution permission
  arm64: dts: imx8mn: Fix NAND controller size-cells
  arm64: dts: imx8mm: Fix NAND controller size-cells
  ARM: dts: imx7: Fix NAND controller size-cells
  arm64: dts: imx8mm-tqma8mqml-mba8mx: Fix USB DR

Link: https://lore.kernel.org/r/20221116090402.GA1274@T480
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-11-16 22:08:07 +01:00
commit 0d6a10dc2b
6 changed files with 42 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/boot/dts/imx7s.dtsi
View File

@ -1270,10 +1270,10 @@
clocks = <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;
};
gpmi: nand-controller@33002000{
gpmi: nand-controller@33002000 {
compatible = "fsl,imx7d-gpmi-nand";
#address-cells = <1>;
#size-cells = <1>;
#size-cells = <0>;
reg = <0x33002000 0x2000>, <0x33004000 0x4000>;
reg-names = "gpmi-nand", "bch";
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;

32
arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts
View File

@ -34,11 +34,25 @@
off-on-delay-us = <12000>;
};
extcon_usbotg1: extcon-usbotg1 {
compatible = "linux,extcon-usb-gpio";
connector {
compatible = "gpio-usb-b-connector", "usb-b-connector";
type = "micro";
label = "X19";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1_extcon>;
id-gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&pinctrl_usb1_connector>;
id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_dr_connector: endpoint {
remote-endpoint = <&usb1_drd_sw>;
};
};
};
};
};
@ -105,13 +119,19 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg1>;
dr_mode = "otg";
extcon = <&extcon_usbotg1>;
srp-disable;
hnp-disable;
adp-disable;
power-active-high;
over-current-active-low;
usb-role-switch;
status = "okay";
port {
usb1_drd_sw: endpoint {
remote-endpoint = <&usb_dr_connector>;
};
};
};
&usbotg2 {
@ -231,7 +251,7 @@
<MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x84>;
};
pinctrl_usb1_extcon: usb1-extcongrp {
pinctrl_usb1_connector: usb1-connectorgrp {
fsl,pins = <MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x1c0>;
};

4
arch/arm64/boot/dts/freescale/imx8mm.dtsi
View File

@ -1244,10 +1244,10 @@
clocks = <&clk IMX8MM_CLK_NAND_USDHC_BUS_RAWNAND_CLK>;
};
gpmi: nand-controller@33002000{
gpmi: nand-controller@33002000 {
compatible = "fsl,imx8mm-gpmi-nand", "fsl,imx7d-gpmi-nand";
#address-cells = <1>;
#size-cells = <1>;
#size-cells = <0>;
reg = <0x33002000 0x2000>, <0x33004000 0x4000>;
reg-names = "gpmi-nand", "bch";
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;

2
arch/arm64/boot/dts/freescale/imx8mn.dtsi
View File

@ -1102,7 +1102,7 @@
gpmi: nand-controller@33002000 {
compatible = "fsl,imx8mn-gpmi-nand", "fsl,imx7d-gpmi-nand";
#address-cells = <1>;
#size-cells = <1>;
#size-cells = <0>;
reg = <0x33002000 0x2000>, <0x33004000 0x4000>;
reg-names = "gpmi-nand", "bch";
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;

0
arch/arm64/boot/dts/freescale/imx93-pinfunc.h Executable file → Normal file
View File

11
drivers/soc/imx/soc-imx8m.c
View File

@ -11,6 +11,7 @@
#include <linux/platform_device.h>
#include <linux/arm-smccc.h>
#include <linux/of.h>
#include <linux/clk.h>
#define REV_B1 0x21
@ -56,6 +57,7 @@ static u32 __init imx8mq_soc_revision(void)
void __iomem *ocotp_base;
u32 magic;
u32 rev;
struct clk *clk;
np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-ocotp");
if (!np)
@ -63,6 +65,13 @@ static u32 __init imx8mq_soc_revision(void)
ocotp_base = of_iomap(np, 0);
WARN_ON(!ocotp_base);
clk = of_clk_get_by_name(np, NULL);
if (!clk) {
WARN_ON(!clk);
return 0;
}
clk_prepare_enable(clk);
/*
* SOC revision on older imx8mq is not available in fuses so query
@ -79,6 +88,8 @@ static u32 __init imx8mq_soc_revision(void)
soc_uid <<= 32;
soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW);
clk_disable_unprepare(clk);
clk_put(clk);
iounmap(ocotp_base);
of_node_put(np);