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genirq: generic chip: remove irq_gc_mask_disable_reg_and_ack()
Any usage of the irq_gc_mask_disable_reg_and_ack() function has been replaced with the desired functionality. The incorrect and ambiguously named function is removed here to prevent accidental misuse. Signed-off-by: Doug Berger <opendmb@gmail.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -1009,7 +1009,6 @@ void irq_gc_mask_clr_bit(struct irq_data *d);
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void irq_gc_unmask_enable_reg(struct irq_data *d);
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void irq_gc_ack_set_bit(struct irq_data *d);
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void irq_gc_ack_clr_bit(struct irq_data *d);
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void irq_gc_mask_disable_reg_and_ack(struct irq_data *d);
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void irq_gc_mask_disable_and_ack_set(struct irq_data *d);
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void irq_gc_eoi(struct irq_data *d);
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int irq_gc_set_wake(struct irq_data *d, unsigned int on);
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@ -134,22 +134,6 @@ void irq_gc_ack_clr_bit(struct irq_data *d)
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irq_gc_unlock(gc);
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}
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/**
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* irq_gc_mask_disable_reg_and_ack - Mask and ack pending interrupt
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* @d: irq_data
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*/
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void irq_gc_mask_disable_reg_and_ack(struct irq_data *d)
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{
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct irq_chip_type *ct = irq_data_get_chip_type(d);
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u32 mask = d->mask;
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irq_gc_lock(gc);
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irq_reg_writel(gc, mask, ct->regs.mask);
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irq_reg_writel(gc, mask, ct->regs.ack);
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irq_gc_unlock(gc);
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}
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/**
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* irq_gc_mask_disable_and_ack_set - Mask and ack pending interrupt
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* @d: irq_data
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