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net-next/hinic: Add api cmd commands
Add the api cmd commands for sending management messages to the nic. Signed-off-by: Aviad Krawczyk <aviad.krawczyk@huawei.com> Signed-off-by: Zhao Chen <zhaochen6@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Aviad Krawczyk
David S. Miller
parent
6dd8b68214
commit
0ac599c790
@ -25,7 +25,9 @@
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#include <linux/jiffies.h>
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#include <linux/delay.h>
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#include <linux/log2.h>
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#include <linux/semaphore.h>
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#include <asm/byteorder.h>
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#include <asm/barrier.h>
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#include "hinic_hw_csr.h"
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#include "hinic_hw_if.h"
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@ -45,14 +47,313 @@
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#define API_CMD_BUF_SIZE 2048
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/* Sizes of the members in hinic_api_cmd_cell */
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#define API_CMD_CELL_DESC_SIZE 8
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#define API_CMD_CELL_DATA_ADDR_SIZE 8
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#define API_CMD_CELL_ALIGNMENT 8
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#define API_CMD_TIMEOUT 1000
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#define MASKED_IDX(chain, idx) ((idx) & ((chain)->num_cells - 1))
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#define SIZE_8BYTES(size) (ALIGN((size), 8) >> 3)
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#define SIZE_4BYTES(size) (ALIGN((size), 4) >> 2)
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#define RD_DMA_ATTR_DEFAULT 0
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#define WR_DMA_ATTR_DEFAULT 0
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enum api_cmd_data_format {
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SGE_DATA = 1, /* cell data is passed by hw address */
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};
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enum api_cmd_type {
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API_CMD_WRITE = 0,
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};
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enum api_cmd_bypass {
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NO_BYPASS = 0,
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BYPASS = 1,
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};
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enum api_cmd_xor_chk_level {
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XOR_CHK_DIS = 0,
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XOR_CHK_ALL = 3,
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};
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static u8 xor_chksum_set(void *data)
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{
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int idx;
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u8 *val, checksum = 0;
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val = data;
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for (idx = 0; idx < 7; idx++)
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checksum ^= val[idx];
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return checksum;
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}
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static void set_prod_idx(struct hinic_api_cmd_chain *chain)
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{
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enum hinic_api_cmd_chain_type chain_type = chain->chain_type;
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struct hinic_hwif *hwif = chain->hwif;
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u32 addr, prod_idx;
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addr = HINIC_CSR_API_CMD_CHAIN_PI_ADDR(chain_type);
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prod_idx = hinic_hwif_read_reg(hwif, addr);
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prod_idx = HINIC_API_CMD_PI_CLEAR(prod_idx, IDX);
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prod_idx |= HINIC_API_CMD_PI_SET(chain->prod_idx, IDX);
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hinic_hwif_write_reg(hwif, addr, prod_idx);
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}
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static u32 get_hw_cons_idx(struct hinic_api_cmd_chain *chain)
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{
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u32 addr, val;
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addr = HINIC_CSR_API_CMD_STATUS_ADDR(chain->chain_type);
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val = hinic_hwif_read_reg(chain->hwif, addr);
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return HINIC_API_CMD_STATUS_GET(val, CONS_IDX);
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}
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/**
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* chain_busy - check if the chain is still processing last requests
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* @chain: chain to check
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*
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* Return 0 - Success, negative - Failure
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**/
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static int chain_busy(struct hinic_api_cmd_chain *chain)
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{
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struct hinic_hwif *hwif = chain->hwif;
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struct pci_dev *pdev = hwif->pdev;
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u32 prod_idx;
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switch (chain->chain_type) {
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case HINIC_API_CMD_WRITE_TO_MGMT_CPU:
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chain->cons_idx = get_hw_cons_idx(chain);
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prod_idx = chain->prod_idx;
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/* check for a space for a new command */
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if (chain->cons_idx == MASKED_IDX(chain, prod_idx + 1)) {
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dev_err(&pdev->dev, "API CMD chain %d is busy\n",
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chain->chain_type);
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return -EBUSY;
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}
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break;
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default:
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dev_err(&pdev->dev, "Unknown API CMD Chain type\n");
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break;
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}
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return 0;
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}
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/**
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* get_cell_data_size - get the data size of a specific cell type
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* @type: chain type
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*
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* Return the data(Desc + Address) size in the cell
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**/
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static u8 get_cell_data_size(enum hinic_api_cmd_chain_type type)
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{
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u8 cell_data_size = 0;
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switch (type) {
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case HINIC_API_CMD_WRITE_TO_MGMT_CPU:
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cell_data_size = ALIGN(API_CMD_CELL_DESC_SIZE +
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API_CMD_CELL_DATA_ADDR_SIZE,
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API_CMD_CELL_ALIGNMENT);
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break;
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default:
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break;
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}
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return cell_data_size;
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}
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/**
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* prepare_cell_ctrl - prepare the ctrl of the cell for the command
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* @cell_ctrl: the control of the cell to set the control value into it
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* @data_size: the size of the data in the cell
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**/
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static void prepare_cell_ctrl(u64 *cell_ctrl, u16 data_size)
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{
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u8 chksum;
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u64 ctrl;
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ctrl = HINIC_API_CMD_CELL_CTRL_SET(SIZE_8BYTES(data_size), DATA_SZ) |
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HINIC_API_CMD_CELL_CTRL_SET(RD_DMA_ATTR_DEFAULT, RD_DMA_ATTR) |
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HINIC_API_CMD_CELL_CTRL_SET(WR_DMA_ATTR_DEFAULT, WR_DMA_ATTR);
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chksum = xor_chksum_set(&ctrl);
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ctrl |= HINIC_API_CMD_CELL_CTRL_SET(chksum, XOR_CHKSUM);
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/* The data in the HW should be in Big Endian Format */
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*cell_ctrl = cpu_to_be64(ctrl);
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}
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/**
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* prepare_api_cmd - prepare API CMD command
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* @chain: chain for the command
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* @dest: destination node on the card that will receive the command
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* @cmd: command data
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* @cmd_size: the command size
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**/
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static void prepare_api_cmd(struct hinic_api_cmd_chain *chain,
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enum hinic_node_id dest,
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void *cmd, u16 cmd_size)
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{
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struct hinic_api_cmd_cell *cell = chain->curr_node;
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struct hinic_api_cmd_cell_ctxt *cell_ctxt;
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struct hinic_hwif *hwif = chain->hwif;
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struct pci_dev *pdev = hwif->pdev;
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cell_ctxt = &chain->cell_ctxt[chain->prod_idx];
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switch (chain->chain_type) {
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case HINIC_API_CMD_WRITE_TO_MGMT_CPU:
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cell->desc = HINIC_API_CMD_DESC_SET(SGE_DATA, API_TYPE) |
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HINIC_API_CMD_DESC_SET(API_CMD_WRITE, RD_WR) |
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HINIC_API_CMD_DESC_SET(NO_BYPASS, MGMT_BYPASS);
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break;
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default:
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dev_err(&pdev->dev, "unknown Chain type\n");
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return;
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}
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cell->desc |= HINIC_API_CMD_DESC_SET(dest, DEST) |
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HINIC_API_CMD_DESC_SET(SIZE_4BYTES(cmd_size), SIZE);
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cell->desc |= HINIC_API_CMD_DESC_SET(xor_chksum_set(&cell->desc),
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XOR_CHKSUM);
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/* The data in the HW should be in Big Endian Format */
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cell->desc = cpu_to_be64(cell->desc);
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memcpy(cell_ctxt->api_cmd_vaddr, cmd, cmd_size);
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}
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/**
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* prepare_cell - prepare cell ctrl and cmd in the current cell
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* @chain: chain for the command
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* @dest: destination node on the card that will receive the command
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* @cmd: command data
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* @cmd_size: the command size
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*
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* Return 0 - Success, negative - Failure
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**/
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static void prepare_cell(struct hinic_api_cmd_chain *chain,
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enum hinic_node_id dest,
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void *cmd, u16 cmd_size)
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{
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struct hinic_api_cmd_cell *curr_node = chain->curr_node;
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u16 data_size = get_cell_data_size(chain->chain_type);
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prepare_cell_ctrl(&curr_node->ctrl, data_size);
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prepare_api_cmd(chain, dest, cmd, cmd_size);
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}
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static inline void cmd_chain_prod_idx_inc(struct hinic_api_cmd_chain *chain)
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{
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chain->prod_idx = MASKED_IDX(chain, chain->prod_idx + 1);
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}
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/**
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* api_cmd_status_update - update the status in the chain struct
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* @chain: chain to update
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**/
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static void api_cmd_status_update(struct hinic_api_cmd_chain *chain)
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{
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enum hinic_api_cmd_chain_type chain_type;
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struct hinic_api_cmd_status *wb_status;
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struct hinic_hwif *hwif = chain->hwif;
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struct pci_dev *pdev = hwif->pdev;
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u64 status_header;
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u32 status;
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wb_status = chain->wb_status;
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status_header = be64_to_cpu(wb_status->header);
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status = be32_to_cpu(wb_status->status);
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if (HINIC_API_CMD_STATUS_GET(status, CHKSUM_ERR)) {
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dev_err(&pdev->dev, "API CMD status: Xor check error\n");
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return;
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}
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chain_type = HINIC_API_CMD_STATUS_HEADER_GET(status_header, CHAIN_ID);
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if (chain_type >= HINIC_API_CMD_MAX) {
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dev_err(&pdev->dev, "unknown API CMD Chain %d\n", chain_type);
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return;
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}
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chain->cons_idx = HINIC_API_CMD_STATUS_GET(status, CONS_IDX);
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}
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/**
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* wait_for_status_poll - wait for write to api cmd command to complete
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* @chain: the chain of the command
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*
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* Return 0 - Success, negative - Failure
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**/
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static int wait_for_status_poll(struct hinic_api_cmd_chain *chain)
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{
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int err = -ETIMEDOUT;
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unsigned long end;
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end = jiffies + msecs_to_jiffies(API_CMD_TIMEOUT);
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do {
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api_cmd_status_update(chain);
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/* wait for CI to be updated - sign for completion */
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if (chain->cons_idx == chain->prod_idx) {
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err = 0;
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break;
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}
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msleep(20);
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} while (time_before(jiffies, end));
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return err;
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}
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/**
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* wait_for_api_cmd_completion - wait for command to complete
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* @chain: chain for the command
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*
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* Return 0 - Success, negative - Failure
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**/
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static int wait_for_api_cmd_completion(struct hinic_api_cmd_chain *chain)
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{
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struct hinic_hwif *hwif = chain->hwif;
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struct pci_dev *pdev = hwif->pdev;
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int err;
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switch (chain->chain_type) {
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case HINIC_API_CMD_WRITE_TO_MGMT_CPU:
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err = wait_for_status_poll(chain);
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if (err) {
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dev_err(&pdev->dev, "API CMD Poll status timeout\n");
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break;
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}
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break;
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default:
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dev_err(&pdev->dev, "unknown API CMD Chain type\n");
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err = -EINVAL;
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break;
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}
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return err;
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}
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/**
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* api_cmd - API CMD command
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* @chain: chain for the command
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@ -65,8 +366,30 @@ enum api_cmd_xor_chk_level {
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static int api_cmd(struct hinic_api_cmd_chain *chain,
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enum hinic_node_id dest, u8 *cmd, u16 cmd_size)
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{
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/* should be implemented */
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return -EINVAL;
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struct hinic_api_cmd_cell_ctxt *ctxt;
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int err;
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down(&chain->sem);
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if (chain_busy(chain)) {
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up(&chain->sem);
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return -EBUSY;
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}
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prepare_cell(chain, dest, cmd, cmd_size);
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cmd_chain_prod_idx_inc(chain);
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wmb(); /* inc pi before issue the command */
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set_prod_idx(chain); /* issue the command */
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ctxt = &chain->cell_ctxt[chain->prod_idx];
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chain->curr_node = ctxt->cell_vaddr;
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err = wait_for_api_cmd_completion(chain);
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up(&chain->sem);
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return err;
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}
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/**
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@ -491,6 +814,8 @@ static int api_chain_init(struct hinic_api_cmd_chain *chain,
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chain->prod_idx = 0;
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chain->cons_idx = 0;
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sema_init(&chain->sem, 1);
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cell_ctxt_size = chain->num_cells * sizeof(*chain->cell_ctxt);
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chain->cell_ctxt = devm_kzalloc(&pdev->dev, cell_ctxt_size, GFP_KERNEL);
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if (!chain->cell_ctxt)
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@ -17,9 +17,22 @@
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#define HINIC_HW_API_CMD_H
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#include <linux/types.h>
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#include <linux/semaphore.h>
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#include "hinic_hw_if.h"
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#define HINIC_API_CMD_PI_IDX_SHIFT 0
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#define HINIC_API_CMD_PI_IDX_MASK 0xFFFFFF
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#define HINIC_API_CMD_PI_SET(val, member) \
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(((u32)(val) & HINIC_API_CMD_PI_##member##_MASK) << \
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HINIC_API_CMD_PI_##member##_SHIFT)
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#define HINIC_API_CMD_PI_CLEAR(val, member) \
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((val) & (~(HINIC_API_CMD_PI_##member##_MASK \
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<< HINIC_API_CMD_PI_##member##_SHIFT)))
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#define HINIC_API_CMD_CHAIN_REQ_RESTART_SHIFT 1
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#define HINIC_API_CMD_CHAIN_REQ_RESTART_MASK 0x1
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@ -58,6 +71,56 @@
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((val) & (~(HINIC_API_CMD_CHAIN_CTRL_##member##_MASK \
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<< HINIC_API_CMD_CHAIN_CTRL_##member##_SHIFT)))
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#define HINIC_API_CMD_CELL_CTRL_DATA_SZ_SHIFT 0
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#define HINIC_API_CMD_CELL_CTRL_RD_DMA_ATTR_SHIFT 16
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#define HINIC_API_CMD_CELL_CTRL_WR_DMA_ATTR_SHIFT 24
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#define HINIC_API_CMD_CELL_CTRL_XOR_CHKSUM_SHIFT 56
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#define HINIC_API_CMD_CELL_CTRL_DATA_SZ_MASK 0x3F
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#define HINIC_API_CMD_CELL_CTRL_RD_DMA_ATTR_MASK 0x3F
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#define HINIC_API_CMD_CELL_CTRL_WR_DMA_ATTR_MASK 0x3F
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#define HINIC_API_CMD_CELL_CTRL_XOR_CHKSUM_MASK 0xFF
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#define HINIC_API_CMD_CELL_CTRL_SET(val, member) \
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((((u64)val) & HINIC_API_CMD_CELL_CTRL_##member##_MASK) << \
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HINIC_API_CMD_CELL_CTRL_##member##_SHIFT)
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#define HINIC_API_CMD_DESC_API_TYPE_SHIFT 0
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#define HINIC_API_CMD_DESC_RD_WR_SHIFT 1
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#define HINIC_API_CMD_DESC_MGMT_BYPASS_SHIFT 2
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#define HINIC_API_CMD_DESC_DEST_SHIFT 32
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#define HINIC_API_CMD_DESC_SIZE_SHIFT 40
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#define HINIC_API_CMD_DESC_XOR_CHKSUM_SHIFT 56
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#define HINIC_API_CMD_DESC_API_TYPE_MASK 0x1
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#define HINIC_API_CMD_DESC_RD_WR_MASK 0x1
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#define HINIC_API_CMD_DESC_MGMT_BYPASS_MASK 0x1
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#define HINIC_API_CMD_DESC_DEST_MASK 0x1F
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#define HINIC_API_CMD_DESC_SIZE_MASK 0x7FF
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#define HINIC_API_CMD_DESC_XOR_CHKSUM_MASK 0xFF
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#define HINIC_API_CMD_DESC_SET(val, member) \
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((((u64)val) & HINIC_API_CMD_DESC_##member##_MASK) << \
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HINIC_API_CMD_DESC_##member##_SHIFT)
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#define HINIC_API_CMD_STATUS_HEADER_CHAIN_ID_SHIFT 16
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#define HINIC_API_CMD_STATUS_HEADER_CHAIN_ID_MASK 0xFF
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#define HINIC_API_CMD_STATUS_HEADER_GET(val, member) \
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(((val) >> HINIC_API_CMD_STATUS_HEADER_##member##_SHIFT) & \
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HINIC_API_CMD_STATUS_HEADER_##member##_MASK)
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#define HINIC_API_CMD_STATUS_CONS_IDX_SHIFT 0
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#define HINIC_API_CMD_STATUS_CHKSUM_ERR_SHIFT 28
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#define HINIC_API_CMD_STATUS_CONS_IDX_MASK 0xFFFFFF
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#define HINIC_API_CMD_STATUS_CHKSUM_ERR_MASK 0x3
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#define HINIC_API_CMD_STATUS_GET(val, member) \
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(((val) >> HINIC_API_CMD_STATUS_##member##_SHIFT) & \
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HINIC_API_CMD_STATUS_##member##_MASK)
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enum hinic_api_cmd_chain_type {
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HINIC_API_CMD_WRITE_TO_MGMT_CPU = 2,
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@ -122,6 +185,8 @@ struct hinic_api_cmd_chain {
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u32 prod_idx;
|
||||
u32 cons_idx;
|
||||
|
||||
struct semaphore sem;
|
||||
|
||||
struct hinic_api_cmd_cell_ctxt *cell_ctxt;
|
||||
|
||||
dma_addr_t wb_status_paddr;
|
||||
|
||||
@ -56,7 +56,13 @@
|
||||
#define HINIC_CSR_API_CMD_CHAIN_CTRL_ADDR(idx) \
|
||||
(HINIC_CSR_API_CMD_BASE + 0x14 + (idx) * HINIC_CSR_API_CMD_STRIDE)
|
||||
|
||||
#define HINIC_CSR_API_CMD_CHAIN_PI_ADDR(idx) \
|
||||
(HINIC_CSR_API_CMD_BASE + 0x1C + (idx) * HINIC_CSR_API_CMD_STRIDE)
|
||||
|
||||
#define HINIC_CSR_API_CMD_CHAIN_REQ_ADDR(idx) \
|
||||
(HINIC_CSR_API_CMD_BASE + 0x20 + (idx) * HINIC_CSR_API_CMD_STRIDE)
|
||||
|
||||
#define HINIC_CSR_API_CMD_STATUS_ADDR(idx) \
|
||||
(HINIC_CSR_API_CMD_BASE + 0x30 + (idx) * HINIC_CSR_API_CMD_STRIDE)
|
||||
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user