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PCI: Delay after FLR of Solidigm P44 Pro NVMe
Prevent KVM hang when a Solidgm P44 Pro NVMe is passed through to a guest
via IOMMU and the guest is subsequently rebooted.
A similar issue was identified and patched by 51ba09452d
("PCI: Delay
after FLR of Intel DC P3700 NVMe") and the same fix can be applied for this
case. (Intel spun off their NAND and SSD business as Solidigm and sold it
to SK Hynix in late 2021.)
Link: https://lore.kernel.org/r/20230507073519.9737-1-mike@oobak.org
Signed-off-by: Mike Pastore <mike@oobak.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
parent
ac9a78681b
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0ac448e0d2
@ -3993,10 +3993,11 @@ static int nvme_disable_and_flr(struct pci_dev *dev, bool probe)
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}
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/*
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* Intel DC P3700 NVMe controller will timeout waiting for ready status
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* to change after NVMe enable if the driver starts interacting with the
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* device too soon after FLR. A 250ms delay after FLR has heuristically
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* proven to produce reliably working results for device assignment cases.
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* Some NVMe controllers such as Intel DC P3700 and Solidigm P44 Pro will
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* timeout waiting for ready status to change after NVMe enable if the driver
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* starts interacting with the device too soon after FLR. A 250ms delay after
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* FLR has heuristically proven to produce reliably working results for device
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* assignment cases.
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*/
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static int delay_250ms_after_flr(struct pci_dev *dev, bool probe)
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{
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@ -4083,6 +4084,7 @@ static const struct pci_dev_reset_methods pci_dev_reset_methods[] = {
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{ PCI_VENDOR_ID_SAMSUNG, 0xa804, nvme_disable_and_flr },
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{ PCI_VENDOR_ID_INTEL, 0x0953, delay_250ms_after_flr },
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{ PCI_VENDOR_ID_INTEL, 0x0a54, delay_250ms_after_flr },
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{ PCI_VENDOR_ID_SOLIDIGM, 0xf1ac, delay_250ms_after_flr },
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{ PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID,
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reset_chelsio_generic_dev },
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{ PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_HINIC_VF,
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@ -158,6 +158,8 @@
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#define PCI_VENDOR_ID_LOONGSON 0x0014
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#define PCI_VENDOR_ID_SOLIDIGM 0x025e
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#define PCI_VENDOR_ID_TTTECH 0x0357
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#define PCI_DEVICE_ID_TTTECH_MC322 0x000a
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