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ARM: l2x0: Add aux control register bitfields
This patch adds the PL310 Auxiliary Control Register bitfields so that SOC's can use these bit fields to construct the AUXCTRL value to be passed/programmed instead of hardcoding it. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -59,7 +59,17 @@
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#define L2X0_CACHE_ID_PART_MASK (0xf << 6)
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#define L2X0_CACHE_ID_PART_L210 (1 << 6)
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#define L2X0_CACHE_ID_PART_L310 (3 << 6)
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#define L2X0_AUX_CTRL_WAY_SIZE_MASK (0x3 << 17)
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#define L2X0_AUX_CTRL_MASK 0xc0000fff
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#define L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT 16
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#define L2X0_AUX_CTRL_WAY_SIZE_SHIFT 17
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#define L2X0_AUX_CTRL_WAY_SIZE_MASK (0x3 << 17)
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#define L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT 22
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#define L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT 26
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#define L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT 27
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#define L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT 28
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#define L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT 29
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#define L2X0_AUX_CTRL_EARLY_BRESP_SHIFT 30
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#ifndef __ASSEMBLY__
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extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask);
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