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phy: qcom-qmp-combo: consolidate lane config
For legacy reasons, there are two configuration parameters that appear to describe the number of lanes a PHY has, even if "nlanes" was actually used for a different purpose. Replace them both with a new field simply named "lanes". Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20220920073826.20811-15-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -816,8 +816,7 @@ struct qmp_phy;
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struct qmp_phy_cfg {
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/* phy-type - PCIE/UFS/USB */
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unsigned int type;
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/* number of lanes provided by phy */
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int nlanes;
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int lanes;
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/* Init sequence for PHY blocks - serdes, tx, rx, pcs */
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const struct qmp_phy_init_tbl *serdes_tbl;
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@ -879,8 +878,6 @@ struct qmp_phy_cfg {
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/* true, if PHY has a separate DP_COM control block */
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bool has_phy_dp_com_ctrl;
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/* true, if PHY has secondary tx/rx lanes to be configured */
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bool is_dual_lane_phy;
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/* Offset from PCS to PCS_USB region */
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unsigned int pcs_usb_offset;
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@ -1029,7 +1026,7 @@ static const char * const sc7180_usb3phy_reset_l[] = {
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static const struct qmp_phy_cfg sc7180_usb3phy_cfg = {
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.type = PHY_TYPE_USB3,
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.nlanes = 1,
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.lanes = 2,
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.serdes_tbl = qmp_v3_usb3_serdes_tbl,
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.serdes_tbl_num = ARRAY_SIZE(qmp_v3_usb3_serdes_tbl),
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@ -1056,12 +1053,11 @@ static const struct qmp_phy_cfg sc7180_usb3phy_cfg = {
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.pwrdn_delay_max = POWER_DOWN_DELAY_US_MAX,
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.has_phy_dp_com_ctrl = true,
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.is_dual_lane_phy = true,
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};
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static const struct qmp_phy_cfg sc7180_dpphy_cfg = {
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.type = PHY_TYPE_DP,
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.nlanes = 1,
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.lanes = 2,
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.serdes_tbl = qmp_v3_dp_serdes_tbl,
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.serdes_tbl_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl),
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@ -1091,7 +1087,6 @@ static const struct qmp_phy_cfg sc7180_dpphy_cfg = {
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.regs = qmp_v3_usb3phy_regs_layout,
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.has_phy_dp_com_ctrl = true,
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.is_dual_lane_phy = true,
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.dp_aux_init = qcom_qmp_v3_phy_dp_aux_init,
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.configure_dp_tx = qcom_qmp_v3_phy_configure_dp_tx,
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@ -1106,7 +1101,7 @@ static const struct qmp_phy_combo_cfg sc7180_usb3dpphy_cfg = {
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static const struct qmp_phy_cfg sdm845_usb3phy_cfg = {
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.type = PHY_TYPE_USB3,
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.nlanes = 1,
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.lanes = 2,
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.serdes_tbl = qmp_v3_usb3_serdes_tbl,
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.serdes_tbl_num = ARRAY_SIZE(qmp_v3_usb3_serdes_tbl),
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@ -1133,7 +1128,6 @@ static const struct qmp_phy_cfg sdm845_usb3phy_cfg = {
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.pwrdn_delay_max = POWER_DOWN_DELAY_US_MAX,
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.has_phy_dp_com_ctrl = true,
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.is_dual_lane_phy = true,
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};
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static const struct qmp_phy_combo_cfg sdm845_usb3dpphy_cfg = {
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@ -1143,7 +1137,7 @@ static const struct qmp_phy_combo_cfg sdm845_usb3dpphy_cfg = {
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static const struct qmp_phy_cfg sm8150_usb3phy_cfg = {
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.type = PHY_TYPE_USB3,
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.nlanes = 1,
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.lanes = 2,
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.serdes_tbl = sm8150_usb3_serdes_tbl,
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.serdes_tbl_num = ARRAY_SIZE(sm8150_usb3_serdes_tbl),
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@ -1174,12 +1168,11 @@ static const struct qmp_phy_cfg sm8150_usb3phy_cfg = {
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.pwrdn_delay_max = POWER_DOWN_DELAY_US_MAX,
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.has_phy_dp_com_ctrl = true,
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.is_dual_lane_phy = true,
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};
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static const struct qmp_phy_cfg sc8180x_dpphy_cfg = {
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.type = PHY_TYPE_DP,
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.nlanes = 1,
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.lanes = 2,
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.serdes_tbl = qmp_v4_dp_serdes_tbl,
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.serdes_tbl_num = ARRAY_SIZE(qmp_v4_dp_serdes_tbl),
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@ -1209,7 +1202,6 @@ static const struct qmp_phy_cfg sc8180x_dpphy_cfg = {
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.regs = qmp_v3_usb3phy_regs_layout,
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.has_phy_dp_com_ctrl = true,
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.is_dual_lane_phy = true,
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.dp_aux_init = qcom_qmp_v4_phy_dp_aux_init,
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.configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx,
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@ -1224,7 +1216,7 @@ static const struct qmp_phy_combo_cfg sc8180x_usb3dpphy_cfg = {
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static const struct qmp_phy_cfg sc8280xp_usb43dp_usb_cfg = {
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.type = PHY_TYPE_USB3,
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.nlanes = 1,
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.lanes = 2,
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.serdes_tbl = sc8280xp_usb43dp_serdes_tbl,
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.serdes_tbl_num = ARRAY_SIZE(sc8280xp_usb43dp_serdes_tbl),
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@ -1252,12 +1244,11 @@ static const struct qmp_phy_cfg sc8280xp_usb43dp_usb_cfg = {
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.pwrdn_delay_max = POWER_DOWN_DELAY_US_MAX,
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.has_phy_dp_com_ctrl = true,
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.is_dual_lane_phy = true,
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};
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static const struct qmp_phy_cfg sc8280xp_usb43dp_dp_cfg = {
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.type = PHY_TYPE_DP,
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.nlanes = 1,
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.lanes = 2,
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.serdes_tbl = qmp_v5_dp_serdes_tbl,
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.serdes_tbl_num = ARRAY_SIZE(qmp_v5_dp_serdes_tbl),
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@ -1287,7 +1278,6 @@ static const struct qmp_phy_cfg sc8280xp_usb43dp_dp_cfg = {
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.regs = qmp_v4_usb3phy_regs_layout,
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.has_phy_dp_com_ctrl = true,
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.is_dual_lane_phy = true,
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.dp_aux_init = qcom_qmp_v4_phy_dp_aux_init,
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.configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx,
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@ -1302,7 +1292,7 @@ static const struct qmp_phy_combo_cfg sc8280xp_usb43dpphy_combo_cfg = {
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static const struct qmp_phy_cfg sm8250_usb3phy_cfg = {
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.type = PHY_TYPE_USB3,
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.nlanes = 1,
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.lanes = 2,
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.serdes_tbl = sm8150_usb3_serdes_tbl,
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.serdes_tbl_num = ARRAY_SIZE(sm8150_usb3_serdes_tbl),
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@ -1332,12 +1322,11 @@ static const struct qmp_phy_cfg sm8250_usb3phy_cfg = {
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.pwrdn_delay_max = POWER_DOWN_DELAY_US_MAX,
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.has_phy_dp_com_ctrl = true,
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.is_dual_lane_phy = true,
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};
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static const struct qmp_phy_cfg sm8250_dpphy_cfg = {
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.type = PHY_TYPE_DP,
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.nlanes = 1,
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.lanes = 2,
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.serdes_tbl = qmp_v4_dp_serdes_tbl,
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.serdes_tbl_num = ARRAY_SIZE(qmp_v4_dp_serdes_tbl),
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@ -1367,7 +1356,6 @@ static const struct qmp_phy_cfg sm8250_dpphy_cfg = {
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.regs = qmp_v4_usb3phy_regs_layout,
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.has_phy_dp_com_ctrl = true,
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.is_dual_lane_phy = true,
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.dp_aux_init = qcom_qmp_v4_phy_dp_aux_init,
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.configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx,
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@ -2117,7 +2105,7 @@ static int qmp_combo_power_on(struct phy *phy)
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/* Tx, Rx, and PCS configurations */
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qmp_combo_configure_lane(tx, cfg->regs, cfg->tx_tbl, cfg->tx_tbl_num, 1);
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if (cfg->is_dual_lane_phy) {
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if (cfg->lanes >= 2) {
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qmp_combo_configure_lane(qphy->tx2, cfg->regs, cfg->tx_tbl,
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cfg->tx_tbl_num, 2);
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}
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@ -2128,7 +2116,7 @@ static int qmp_combo_power_on(struct phy *phy)
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qmp_combo_configure_lane(rx, cfg->regs, cfg->rx_tbl, cfg->rx_tbl_num, 1);
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if (cfg->is_dual_lane_phy) {
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if (cfg->lanes >= 2) {
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qmp_combo_configure_lane(qphy->rx2, cfg->regs, cfg->rx_tbl,
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cfg->rx_tbl_num, 2);
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}
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@ -2725,7 +2713,7 @@ static int qmp_combo_create(struct device *dev, struct device_node *np, int id,
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if (cfg->pcs_usb_offset)
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qphy->pcs_usb = qphy->pcs + cfg->pcs_usb_offset;
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if (cfg->is_dual_lane_phy) {
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if (cfg->lanes >= 2) {
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qphy->tx2 = devm_of_iomap(dev, np, 3, NULL);
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if (IS_ERR(qphy->tx2))
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return PTR_ERR(qphy->tx2);
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