media: mt9p031: Increase post-reset delay

The MT9P006 sensor driver sporadically fails to probe because the sensor
responds with a NACK condition to I2C address on the bus during an attempt
to read the sensor MT9P031_CHIP_VERSION register in mt9p031_registered().

Neither the MT9P006 nor MT9P031 datasheets are clear on reset signal timing.
Older MT9M034 [1] datasheet provides those timing figures in Appendix-A and
indicates it is necessary to wait 850000 EXTCLK cycles before starting any
I2C communication.

Add such a delay, which does make the sporadic I2C NACK go away, so it is
likely similar constraint applies to this sensor.

[1] https://www.onsemi.com/pdf/datasheet/mt9m034-d.pdf

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
This commit is contained in:
Marek Vasut 2022-08-23 23:22:16 +01:00 committed by Mauro Carvalho Chehab
parent c4cfd47eb4
commit 0958944a93

View File

@ -307,6 +307,7 @@ static inline int mt9p031_pll_disable(struct mt9p031 *mt9p031)
static int mt9p031_power_on(struct mt9p031 *mt9p031)
{
unsigned long rate, delay;
int ret;
/* Ensure RESET_BAR is active */
@ -334,7 +335,12 @@ static int mt9p031_power_on(struct mt9p031 *mt9p031)
/* Now RESET_BAR must be high */
if (mt9p031->reset) {
gpiod_set_value(mt9p031->reset, 0);
usleep_range(1000, 2000);
/* Wait 850000 EXTCLK cycles before de-asserting reset. */
rate = clk_get_rate(mt9p031->clk);
if (!rate)
rate = 6000000; /* Slowest supported clock, 6 MHz */
delay = DIV_ROUND_UP(850000 * 1000, rate);
msleep(delay);
}
return 0;