mirror of
https://github.com/torvalds/linux.git
synced 2024-11-19 02:21:47 +00:00
powerpc/85xx: Add host-pci(e) bridge only for RC
FSL PCIe controller can act as agent(EP) or host(RC). Under Agent(EP) mode the controller will be configured by the host system. So its not required to be registered with the PCI(e) sub-system. We only register the controller if its configured in host(RC) mode. Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
parent
3907ab2686
commit
08871c097e
@ -330,6 +330,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
|
||||
struct pci_controller *hose;
|
||||
struct resource rsrc;
|
||||
const int *bus_range;
|
||||
u8 progif;
|
||||
|
||||
if (!of_device_is_available(dev)) {
|
||||
pr_warning("%s: disabled\n", dev->full_name);
|
||||
@ -360,6 +361,18 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
|
||||
|
||||
setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4,
|
||||
PPC_INDIRECT_TYPE_BIG_ENDIAN);
|
||||
|
||||
early_read_config_byte(hose, 0, 0, PCI_CLASS_PROG, &progif);
|
||||
if ((progif & 1) == 1) {
|
||||
/* unmap cfg_data & cfg_addr separately if not on same page */
|
||||
if (((unsigned long)hose->cfg_data & PAGE_MASK) !=
|
||||
((unsigned long)hose->cfg_addr & PAGE_MASK))
|
||||
iounmap(hose->cfg_data);
|
||||
iounmap(hose->cfg_addr);
|
||||
pcibios_free_controller(hose);
|
||||
return 0;
|
||||
}
|
||||
|
||||
setup_pci_cmd(hose);
|
||||
|
||||
/* check PCI express link status */
|
||||
|
Loading…
Reference in New Issue
Block a user