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usb: dwc3: exynos: Add support for Exynos5422 suspend clk
Exynos5422 DWC3 module support two clk USBD300 and SCLK_USBD300 so add missing code to enable/disable code and suspend clk, for this add a new compatible samsung,exynos5420-dwusb3 to help configure dwc3 code and dwc3 suspend clock. Suspend clock controls the PHY power change from P0 to P1/P2/P3 during U0 to U1/U2/U3 transition. Signed-off-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
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@ -162,6 +162,12 @@ static const struct dwc3_exynos_driverdata exynos5250_drvdata = {
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.suspend_clk_idx = -1,
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};
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static const struct dwc3_exynos_driverdata exynos5420_drvdata = {
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.clk_names = { "usbdrd30", "usbdrd30_susp_clk"},
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.num_clks = 2,
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.suspend_clk_idx = 1,
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};
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static const struct dwc3_exynos_driverdata exynos5433_drvdata = {
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.clk_names = { "aclk", "susp_clk", "pipe_pclk", "phyclk" },
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.num_clks = 4,
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@ -178,6 +184,9 @@ static const struct of_device_id exynos_dwc3_match[] = {
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{
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.compatible = "samsung,exynos5250-dwusb3",
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.data = &exynos5250_drvdata,
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}, {
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.compatible = "samsung,exynos5420-dwusb3",
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.data = &exynos5420_drvdata,
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}, {
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.compatible = "samsung,exynos5433-dwusb3",
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.data = &exynos5433_drvdata,
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