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dmaengine: sun6i: Add support for A100 DMA
The dma of a100 is similar to h6, with some minor changes to support greater addressing capabilities. Add support for it. Signed-off-by: Yangtao Li <frank@allwinnertech.com> Link: https://lore.kernel.org/r/719852c6a9a597bd2e82d01a268ca02b9dee826c.1604988979.git.frank@allwinnertech.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -1173,6 +1173,30 @@ static struct sun6i_dma_config sun50i_a64_dma_cfg = {
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BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
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};
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/*
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* TODO: Add support for more than 4g physical addressing.
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*
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* The A100 binding uses the number of dma channels from the
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* device tree node.
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*/
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static struct sun6i_dma_config sun50i_a100_dma_cfg = {
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.clock_autogate_enable = sun6i_enable_clock_autogate_h3,
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.set_burst_length = sun6i_set_burst_length_h3,
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.set_drq = sun6i_set_drq_h6,
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.set_mode = sun6i_set_mode_h6,
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.src_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16),
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.dst_burst_lengths = BIT(1) | BIT(4) | BIT(8) | BIT(16),
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.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
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BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
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BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |
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BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
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.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
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BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
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BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) |
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BIT(DMA_SLAVE_BUSWIDTH_8_BYTES),
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.has_mbus_clk = true,
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};
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/*
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* The H6 binding uses the number of dma channels from the
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* device tree node.
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@ -1225,6 +1249,7 @@ static const struct of_device_id sun6i_dma_match[] = {
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{ .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg },
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{ .compatible = "allwinner,sun8i-v3s-dma", .data = &sun8i_v3s_dma_cfg },
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{ .compatible = "allwinner,sun50i-a64-dma", .data = &sun50i_a64_dma_cfg },
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{ .compatible = "allwinner,sun50i-a100-dma", .data = &sun50i_a100_dma_cfg },
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{ .compatible = "allwinner,sun50i-h6-dma", .data = &sun50i_h6_dma_cfg },
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{ /* sentinel */ }
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};
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