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Merge branches 'clock_cleanup_misc_3.6', 'control_clean_dspbridge_writes_cleanup_3.6', 'hwmod_soc_conditional_cleanup_3.6', 'mcbsp_clock_aliases_cleanup_3.6' and 'remove_clkdm_requirement_from_hwmod_3.6' into omap_cleanup_a_3.6

Browse Source 
Conflicts:
	arch/arm/mach-omap2/omap_hwmod.c
This commit is contained in:
Paul Walmsley 2012-06-20 20:11:36 -06:00
commit 07b3a13957
21 changed files with 409 additions and 185 deletions
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1
arch/arm/mach-omap2/Makefile
View File

@ -116,7 +116,6 @@ obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o
# PRCM clockdomain control
clockdomain-common += clockdomain.o
clockdomain-common += clockdomains_common_data.o
obj-$(CONFIG_ARCH_OMAP2) += $(clockdomain-common)
obj-$(CONFIG_ARCH_OMAP2) += clockdomain2xxx_3xxx.o
obj-$(CONFIG_ARCH_OMAP2) += clockdomains2xxx_3xxx_data.o

4
arch/arm/mach-omap2/clock2420_data.c
View File

@ -1774,8 +1774,6 @@ static struct omap_clk omap2420_clks[] = {
CLK(NULL, "osc_ck", &osc_ck, CK_242X),
CLK(NULL, "sys_ck", &sys_ck, CK_242X),
CLK(NULL, "alt_ck", &alt_ck, CK_242X),
CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_242X),
CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_242X),
CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_242X),
/* internal analog sources */
CLK(NULL, "dpll_ck", &dpll_ck, CK_242X),
@ -1784,8 +1782,6 @@ static struct omap_clk omap2420_clks[] = {
/* internal prcm root sources */
CLK(NULL, "func_54m_ck", &func_54m_ck, CK_242X),
CLK(NULL, "core_ck", &core_ck, CK_242X),
CLK("omap-mcbsp.1", "prcm_fck", &func_96m_ck, CK_242X),
CLK("omap-mcbsp.2", "prcm_fck", &func_96m_ck, CK_242X),
CLK(NULL, "func_96m_ck", &func_96m_ck, CK_242X),
CLK(NULL, "func_48m_ck", &func_48m_ck, CK_242X),
CLK(NULL, "func_12m_ck", &func_12m_ck, CK_242X),

10
arch/arm/mach-omap2/clock2430_data.c
View File

@ -1858,11 +1858,6 @@ static struct omap_clk omap2430_clks[] = {
CLK(NULL, "osc_ck", &osc_ck, CK_243X),
CLK(NULL, "sys_ck", &sys_ck, CK_243X),
CLK(NULL, "alt_ck", &alt_ck, CK_243X),
CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_243X),
CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_243X),
CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_243X),
CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_243X),
CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_243X),
CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_243X),
/* internal analog sources */
CLK(NULL, "dpll_ck", &dpll_ck, CK_243X),
@ -1871,11 +1866,6 @@ static struct omap_clk omap2430_clks[] = {
/* internal prcm root sources */
CLK(NULL, "func_54m_ck", &func_54m_ck, CK_243X),
CLK(NULL, "core_ck", &core_ck, CK_243X),
CLK("omap-mcbsp.1", "prcm_fck", &func_96m_ck, CK_243X),
CLK("omap-mcbsp.2", "prcm_fck", &func_96m_ck, CK_243X),
CLK("omap-mcbsp.3", "prcm_fck", &func_96m_ck, CK_243X),
CLK("omap-mcbsp.4", "prcm_fck", &func_96m_ck, CK_243X),
CLK("omap-mcbsp.5", "prcm_fck", &func_96m_ck, CK_243X),
CLK(NULL, "func_96m_ck", &func_96m_ck, CK_243X),
CLK(NULL, "func_48m_ck", &func_48m_ck, CK_243X),
CLK(NULL, "func_12m_ck", &func_12m_ck, CK_243X),

10
arch/arm/mach-omap2/clock3xxx_data.c
View File

@ -3236,11 +3236,6 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(NULL, "osc_sys_ck", &osc_sys_ck, CK_3XXX),
CLK(NULL, "sys_ck", &sys_ck, CK_3XXX),
CLK(NULL, "sys_altclk", &sys_altclk, CK_3XXX),
CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_3XXX),
CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_3XXX),
CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_3XXX),
CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_3XXX),
CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_3XXX),
CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_3XXX),
CLK(NULL, "sys_clkout1", &sys_clkout1, CK_3XXX),
CLK(NULL, "dpll1_ck", &dpll1_ck, CK_3XXX),
@ -3307,8 +3302,6 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
CLK("usbhs_omap", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX),
CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX),
CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX),
CLK(NULL, "mmchs3_fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_3XXX),
@ -3413,9 +3406,6 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick, CK_3XXX),
CLK(NULL, "gpt12_ick", &gpt12_ick, CK_3XXX),
CLK(NULL, "gpt1_ick", &gpt1_ick, CK_3XXX),
CLK("omap-mcbsp.2", "prcm_fck", &per_96m_fck, CK_3XXX),
CLK("omap-mcbsp.3", "prcm_fck", &per_96m_fck, CK_3XXX),
CLK("omap-mcbsp.4", "prcm_fck", &per_96m_fck, CK_3XXX),
CLK(NULL, "per_96m_fck", &per_96m_fck, CK_3XXX),
CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX),
CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX),

2
arch/arm/mach-omap2/clockdomain.h
View File

@ -206,7 +206,5 @@ extern struct clkdm_ops omap4_clkdm_operations;
extern struct clkdm_dep gfx_24xx_wkdeps[];
extern struct clkdm_dep dsp_24xx_wkdeps[];
extern struct clockdomain wkup_common_clkdm;
extern struct clockdomain prm_common_clkdm;
extern struct clockdomain cm_common_clkdm;
#endif

2
arch/arm/mach-omap2/clockdomains2420_data.c
View File

@ -131,8 +131,6 @@ static struct clockdomain dss_2420_clkdm = {
static struct clockdomain *clockdomains_omap242x[] __initdata = {
&wkup_common_clkdm,
&cm_common_clkdm,
&prm_common_clkdm,
&mpu_2420_clkdm,
&iva1_2420_clkdm,
&dsp_2420_clkdm,

2
arch/arm/mach-omap2/clockdomains2430_data.c
View File

@ -157,8 +157,6 @@ static struct clockdomain dss_2430_clkdm = {
static struct clockdomain *clockdomains_omap243x[] __initdata = {
&wkup_common_clkdm,
&cm_common_clkdm,
&prm_common_clkdm,
&mpu_2430_clkdm,
&mdm_clkdm,
&dsp_2430_clkdm,

2
arch/arm/mach-omap2/clockdomains3xxx_data.c
View File

@ -347,8 +347,6 @@ static struct clkdm_autodep clkdm_autodeps[] = {
static struct clockdomain *clockdomains_omap3430_common[] __initdata = {
&wkup_common_clkdm,
&cm_common_clkdm,
&prm_common_clkdm,
&mpu_3xxx_clkdm,
&neon_clkdm,
&iva2_clkdm,

2
arch/arm/mach-omap2/clockdomains44xx_data.c
View File

@ -430,8 +430,6 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = {
&l4_wkup_44xx_clkdm,
&emu_sys_44xx_clkdm,
&l3_dma_44xx_clkdm,
&prm_common_clkdm,
&cm_common_clkdm,
NULL
};

24
arch/arm/mach-omap2/clockdomains_common_data.c
View File

@ -1,24 +0,0 @@
/*
* OMAP2+-common clockdomain data
*
* Copyright (C) 2008-2012 Texas Instruments, Inc.
* Copyright (C) 2008-2010 Nokia Corporation
*
* Paul Walmsley, Jouni Högander
*/
#include <linux/kernel.h>
#include <linux/io.h>
#include "clockdomain.h"
/* These are implicit clockdomains - they are never defined as such in TRM */
struct clockdomain prm_common_clkdm = {
.name = "prm_clkdm",
.pwrdm = { .name = "wkup_pwrdm" },
};
struct clockdomain cm_common_clkdm = {
.name = "cm_clkdm",
.pwrdm = { .name = "core_pwrdm" },
};

43
arch/arm/mach-omap2/control.c
View File

@ -241,6 +241,49 @@ void omap3_ctrl_write_boot_mode(u8 bootmode)
#endif
/**
* omap_ctrl_write_dsp_boot_addr - set boot address for a remote processor
* @bootaddr: physical address of the boot loader
*
* Set boot address for the boot loader of a supported processor
* when a power ON sequence occurs.
*/
void omap_ctrl_write_dsp_boot_addr(u32 bootaddr)
{
u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTADDR :
cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTADDR :
cpu_is_omap44xx() ? OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR :
0;
if (!offset) {
pr_err("%s: unsupported omap type\n", __func__);
return;
}
omap_ctrl_writel(bootaddr, offset);
}
/**
* omap_ctrl_write_dsp_boot_mode - set boot mode for a remote processor
* @bootmode: 8-bit value to pass to some boot code
*
* Sets boot mode for the boot loader of a supported processor
* when a power ON sequence occurs.
*/
void omap_ctrl_write_dsp_boot_mode(u8 bootmode)
{
u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTMOD :
cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTMOD :
0;
if (!offset) {
pr_err("%s: unsupported omap type\n", __func__);
return;
}
omap_ctrl_writel(bootmode, offset);
}
#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
/*
* Clears the scratchpad contents in case of cold boot-

2
arch/arm/mach-omap2/control.h
View File

@ -397,6 +397,8 @@ extern u32 omap3_arm_context[128];
extern void omap3_control_save_context(void);
extern void omap3_control_restore_context(void);
extern void omap3_ctrl_write_boot_mode(u8 bootmode);
extern void omap_ctrl_write_dsp_boot_addr(u32 bootaddr);
extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode);
extern void omap3630_ctrl_disable_rta(void);
extern int omap3_ctrl_save_padconf(void);
#else

4
arch/arm/mach-omap2/dsp.c
View File

@ -20,6 +20,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include "control.h"
#include "cm2xxx_3xxx.h"
#include "prm2xxx_3xxx.h"
#ifdef CONFIG_BRIDGE_DVFS
@ -43,6 +44,9 @@ static struct omap_dsp_platform_data omap_dsp_pdata __initdata = {
.dsp_cm_read = omap2_cm_read_mod_reg,
.dsp_cm_write = omap2_cm_write_mod_reg,
.dsp_cm_rmw_bits = omap2_cm_rmw_mod_reg_bits,
.set_bootaddr = omap_ctrl_write_dsp_boot_addr,
.set_bootmode = omap_ctrl_write_dsp_boot_mode,
};
static phys_addr_t omap_dsp_phys_mempool_base;

1
arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h
View File

@ -42,6 +42,7 @@
#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_1 0x0268
#define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4
#define OMAP4_CTRL_MODULE_CORE_DEV_CONF 0x0300
#define OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR 0x0304
#define OMAP4_CTRL_MODULE_CORE_LDOVBB_IVA_VOLTAGE_CTRL 0x0314
#define OMAP4_CTRL_MODULE_CORE_LDOVBB_MPU_VOLTAGE_CTRL 0x0318
#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL 0x0320

427
arch/arm/mach-omap2/omap_hwmod.c
View File

@ -166,6 +166,31 @@
*/
#define LINKS_PER_OCP_IF 2
/**
* struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
* @enable_module: function to enable a module (via MODULEMODE)
* @disable_module: function to disable a module (via MODULEMODE)
*
* XXX Eventually this functionality will be hidden inside the PRM/CM
* device drivers. Until then, this should avoid huge blocks of cpu_is_*()
* conditionals in this code.
*/
struct omap_hwmod_soc_ops {
void (*enable_module)(struct omap_hwmod *oh);
int (*disable_module)(struct omap_hwmod *oh);
int (*wait_target_ready)(struct omap_hwmod *oh);
int (*assert_hardreset)(struct omap_hwmod *oh,
struct omap_hwmod_rst_info *ohri);
int (*deassert_hardreset)(struct omap_hwmod *oh,
struct omap_hwmod_rst_info *ohri);
int (*is_hardreset_asserted)(struct omap_hwmod *oh,
struct omap_hwmod_rst_info *ohri);
int (*init_clkdm)(struct omap_hwmod *oh);
};
/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
static struct omap_hwmod_soc_ops soc_ops;
/* omap_hwmod_list contains all registered struct omap_hwmods */
static LIST_HEAD(omap_hwmod_list);
@ -186,6 +211,9 @@ static struct omap_hwmod_link *linkspace;
*/
static unsigned short free_ls, max_ls, ls_supp;
/* inited: set to true once the hwmod code is initialized */
static bool inited;
/* Private functions */
/**
@ -771,23 +799,19 @@ static void _disable_optional_clocks(struct omap_hwmod *oh)
}
/**
* _enable_module - enable CLKCTRL modulemode on OMAP4
* _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
* @oh: struct omap_hwmod *
*
* Enables the PRCM module mode related to the hwmod @oh.
* No return value.
*/
static void _enable_module(struct omap_hwmod *oh)
static void _omap4_enable_module(struct omap_hwmod *oh)
{
/* The module mode does not exist prior OMAP4 */
if (cpu_is_omap24xx() || cpu_is_omap34xx())
return;
if (!oh->clkdm || !oh->prcm.omap4.modulemode)
return;
pr_debug("omap_hwmod: %s: _enable_module: %d\n",
oh->name, oh->prcm.omap4.modulemode);
pr_debug("omap_hwmod: %s: %s: %d\n",
oh->name, __func__, oh->prcm.omap4.modulemode);
omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
oh->clkdm->prcm_partition,
@ -807,10 +831,7 @@ static void _enable_module(struct omap_hwmod *oh)
*/
static int _omap4_wait_target_disable(struct omap_hwmod *oh)
{
if (!cpu_is_omap44xx())
return 0;
if (!oh)
if (!oh || !oh->clkdm)
return -EINVAL;
if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
@ -1285,24 +1306,20 @@ static struct omap_hwmod *_lookup(const char *name)
return oh;
}
/**
* _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
* @oh: struct omap_hwmod *
*
* Convert a clockdomain name stored in a struct omap_hwmod into a
* clockdomain pointer, and save it into the struct omap_hwmod.
* return -EINVAL if clkdm_name does not exist or if the lookup failed.
* Return -EINVAL if the clkdm_name lookup failed.
*/
static int _init_clkdm(struct omap_hwmod *oh)
{
if (cpu_is_omap24xx() || cpu_is_omap34xx())
if (!oh->clkdm_name)
return 0;
if (!oh->clkdm_name) {
pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
return -EINVAL;
}
oh->clkdm = clkdm_lookup(oh->clkdm_name);
if (!oh->clkdm) {
pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
@ -1338,7 +1355,8 @@ static int _init_clocks(struct omap_hwmod *oh, void *data)
ret |= _init_main_clk(oh);
ret |= _init_interface_clks(oh);
ret |= _init_opt_clks(oh);
ret |= _init_clkdm(oh);
if (soc_ops.init_clkdm)
ret |= soc_ops.init_clkdm(oh);
if (!ret)
oh->_state = _HWMOD_STATE_CLKS_INITED;
@ -1348,53 +1366,6 @@ static int _init_clocks(struct omap_hwmod *oh, void *data)
return ret;
}
/**
* _wait_target_ready - wait for a module to leave slave idle
* @oh: struct omap_hwmod *
*
* Wait for a module @oh to leave slave idle. Returns 0 if the module
* does not have an IDLEST bit or if the module successfully leaves
* slave idle; otherwise, pass along the return value of the
* appropriate *_cm*_wait_module_ready() function.
*/
static int _wait_target_ready(struct omap_hwmod *oh)
{
struct omap_hwmod_ocp_if *os;
int ret;
if (!oh)
return -EINVAL;
if (oh->flags & HWMOD_NO_IDLEST)
return 0;
os = _find_mpu_rt_port(oh);
if (!os)
return 0;
/* XXX check module SIDLEMODE */
/* XXX check clock enable states */
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
oh->prcm.omap2.idlest_reg_id,
oh->prcm.omap2.idlest_idle_bit);
} else if (cpu_is_omap44xx()) {
if (!oh->clkdm)
return -EINVAL;
ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
oh->clkdm->cm_inst,
oh->clkdm->clkdm_offs,
oh->prcm.omap4.clkctrl_offs);
} else {
BUG();
};
return ret;
}
/**
* _lookup_hardreset - fill register bit info for this hwmod/reset line
* @oh: struct omap_hwmod *
@ -1431,32 +1402,31 @@ static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
* @oh: struct omap_hwmod *
* @name: name of the reset line to lookup and assert
*
* Some IP like dsp, ipu or iva contain processor that require
* an HW reset line to be assert / deassert in order to enable fully
* the IP.
* Some IP like dsp, ipu or iva contain processor that require an HW
* reset line to be assert / deassert in order to enable fully the IP.
* Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
* asserting the hardreset line on the currently-booted SoC, or passes
* along the return value from _lookup_hardreset() or the SoC's
* assert_hardreset code.
*/
static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
{
struct omap_hwmod_rst_info ohri;
u8 ret;
u8 ret = -EINVAL;
if (!oh)
return -EINVAL;
if (!soc_ops.assert_hardreset)
return -ENOSYS;
ret = _lookup_hardreset(oh, name, &ohri);
if (IS_ERR_VALUE(ret))
return ret;
if (cpu_is_omap24xx() || cpu_is_omap34xx())
return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
ohri.rst_shift);
else if (cpu_is_omap44xx())
return omap4_prminst_assert_hardreset(ohri.rst_shift,
oh->clkdm->pwrdm.ptr->prcm_partition,
oh->clkdm->pwrdm.ptr->prcm_offs,
oh->prcm.omap4.rstctrl_offs);
else
return -EINVAL;
ret = soc_ops.assert_hardreset(oh, &ohri);
return ret;
}
/**
@ -1465,38 +1435,29 @@ static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
* @oh: struct omap_hwmod *
* @name: name of the reset line to look up and deassert
*
* Some IP like dsp, ipu or iva contain processor that require
* an HW reset line to be assert / deassert in order to enable fully
* the IP.
* Some IP like dsp, ipu or iva contain processor that require an HW
* reset line to be assert / deassert in order to enable fully the IP.
* Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
* deasserting the hardreset line on the currently-booted SoC, or passes
* along the return value from _lookup_hardreset() or the SoC's
* deassert_hardreset code.
*/
static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
{
struct omap_hwmod_rst_info ohri;
int ret;
int ret = -EINVAL;
if (!oh)
return -EINVAL;
if (!soc_ops.deassert_hardreset)
return -ENOSYS;
ret = _lookup_hardreset(oh, name, &ohri);
if (IS_ERR_VALUE(ret))
return ret;
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
ohri.rst_shift,
ohri.st_shift);
} else if (cpu_is_omap44xx()) {
if (ohri.st_shift)
pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
oh->name, name);
ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
oh->clkdm->pwrdm.ptr->prcm_partition,
oh->clkdm->pwrdm.ptr->prcm_offs,
oh->prcm.omap4.rstctrl_offs);
} else {
return -EINVAL;
}
ret = soc_ops.deassert_hardreset(oh, &ohri);
if (ret == -EBUSY)
pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
@ -1509,31 +1470,28 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
* @oh: struct omap_hwmod *
* @name: name of the reset line to look up and read
*
* Return the state of the reset line.
* Return the state of the reset line. Returns -EINVAL if @oh is
* null, -ENOSYS if we have no way of reading the hardreset line
* status on the currently-booted SoC, or passes along the return
* value from _lookup_hardreset() or the SoC's is_hardreset_asserted
* code.
*/
static int _read_hardreset(struct omap_hwmod *oh, const char *name)
{
struct omap_hwmod_rst_info ohri;
u8 ret;
u8 ret = -EINVAL;
if (!oh)
return -EINVAL;
if (!soc_ops.is_hardreset_asserted)
return -ENOSYS;
ret = _lookup_hardreset(oh, name, &ohri);
if (IS_ERR_VALUE(ret))
return ret;
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
ohri.st_shift);
} else if (cpu_is_omap44xx()) {
return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
oh->clkdm->pwrdm.ptr->prcm_partition,
oh->clkdm->pwrdm.ptr->prcm_offs,
oh->prcm.omap4.rstctrl_offs);
} else {
return -EINVAL;
}
return soc_ops.is_hardreset_asserted(oh, &ohri);
}
/**
@ -1571,10 +1529,6 @@ static int _omap4_disable_module(struct omap_hwmod *oh)
{
int v;
/* The module mode does not exist prior OMAP4 */
if (!cpu_is_omap44xx())
return -EINVAL;
if (!oh->clkdm || !oh->prcm.omap4.modulemode)
return -EINVAL;
@ -1814,9 +1768,11 @@ static int _enable(struct omap_hwmod *oh)
}
_enable_clocks(oh);
_enable_module(oh);
if (soc_ops.enable_module)
soc_ops.enable_module(oh);
r = _wait_target_ready(oh);
r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
-EINVAL;
if (!r) {
/*
* Set the clockdomain to HW_AUTO only if the target is ready,
@ -1870,7 +1826,8 @@ static int _idle(struct omap_hwmod *oh)
_idle_sysc(oh);
_del_initiator_dep(oh, mpu_oh);
_omap4_disable_module(oh);
if (soc_ops.disable_module)
soc_ops.disable_module(oh);
/*
* The module must be in idle mode before disabling any parents
@ -1975,7 +1932,8 @@ static int _shutdown(struct omap_hwmod *oh)
if (oh->_state == _HWMOD_STATE_ENABLED) {
_del_initiator_dep(oh, mpu_oh);
/* XXX what about the other system initiators here? dma, dsp */
_omap4_disable_module(oh);
if (soc_ops.disable_module)
soc_ops.disable_module(oh);
_disable_clocks(oh);
if (oh->clkdm)
clkdm_hwmod_disable(oh->clkdm, oh);
@ -2431,6 +2389,194 @@ static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
return 0;
}
/* Static functions intended only for use in soc_ops field function pointers */
/**
* _omap2_wait_target_ready - wait for a module to leave slave idle
* @oh: struct omap_hwmod *
*
* Wait for a module @oh to leave slave idle. Returns 0 if the module
* does not have an IDLEST bit or if the module successfully leaves
* slave idle; otherwise, pass along the return value of the
* appropriate *_cm*_wait_module_ready() function.
*/
static int _omap2_wait_target_ready(struct omap_hwmod *oh)
{
if (!oh)
return -EINVAL;
if (oh->flags & HWMOD_NO_IDLEST)
return 0;
if (!_find_mpu_rt_port(oh))
return 0;
/* XXX check module SIDLEMODE, hardreset status, enabled clocks */
return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
oh->prcm.omap2.idlest_reg_id,
oh->prcm.omap2.idlest_idle_bit);
}
/**
* _omap4_wait_target_ready - wait for a module to leave slave idle
* @oh: struct omap_hwmod *
*
* Wait for a module @oh to leave slave idle. Returns 0 if the module
* does not have an IDLEST bit or if the module successfully leaves
* slave idle; otherwise, pass along the return value of the
* appropriate *_cm*_wait_module_ready() function.
*/
static int _omap4_wait_target_ready(struct omap_hwmod *oh)
{
if (!oh || !oh->clkdm)
return -EINVAL;
if (oh->flags & HWMOD_NO_IDLEST)
return 0;
if (!_find_mpu_rt_port(oh))
return 0;
/* XXX check module SIDLEMODE, hardreset status */
return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
oh->clkdm->cm_inst,
oh->clkdm->clkdm_offs,
oh->prcm.omap4.clkctrl_offs);
}
/**
* _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
* @oh: struct omap_hwmod * to assert hardreset
* @ohri: hardreset line data
*
* Call omap2_prm_assert_hardreset() with parameters extracted from
* the hwmod @oh and the hardreset line data @ohri. Only intended for
* use as an soc_ops function pointer. Passes along the return value
* from omap2_prm_assert_hardreset(). XXX This function is scheduled
* for removal when the PRM code is moved into drivers/.
*/
static int _omap2_assert_hardreset(struct omap_hwmod *oh,
struct omap_hwmod_rst_info *ohri)
{
return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
ohri->rst_shift);
}
/**
* _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
* @oh: struct omap_hwmod * to deassert hardreset
* @ohri: hardreset line data
*
* Call omap2_prm_deassert_hardreset() with parameters extracted from
* the hwmod @oh and the hardreset line data @ohri. Only intended for
* use as an soc_ops function pointer. Passes along the return value
* from omap2_prm_deassert_hardreset(). XXX This function is
* scheduled for removal when the PRM code is moved into drivers/.
*/
static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
struct omap_hwmod_rst_info *ohri)
{
return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
ohri->rst_shift,
ohri->st_shift);
}
/**
* _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
* @oh: struct omap_hwmod * to test hardreset
* @ohri: hardreset line data
*
* Call omap2_prm_is_hardreset_asserted() with parameters extracted
* from the hwmod @oh and the hardreset line data @ohri. Only
* intended for use as an soc_ops function pointer. Passes along the
* return value from omap2_prm_is_hardreset_asserted(). XXX This
* function is scheduled for removal when the PRM code is moved into
* drivers/.
*/
static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
struct omap_hwmod_rst_info *ohri)
{
return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
ohri->st_shift);
}
/**
* _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
* @oh: struct omap_hwmod * to assert hardreset
* @ohri: hardreset line data
*
* Call omap4_prminst_assert_hardreset() with parameters extracted
* from the hwmod @oh and the hardreset line data @ohri. Only
* intended for use as an soc_ops function pointer. Passes along the
* return value from omap4_prminst_assert_hardreset(). XXX This
* function is scheduled for removal when the PRM code is moved into
* drivers/.
*/
static int _omap4_assert_hardreset(struct omap_hwmod *oh,
struct omap_hwmod_rst_info *ohri)
{
if (!oh->clkdm)
return -EINVAL;
return omap4_prminst_assert_hardreset(ohri->rst_shift,
oh->clkdm->pwrdm.ptr->prcm_partition,
oh->clkdm->pwrdm.ptr->prcm_offs,
oh->prcm.omap4.rstctrl_offs);
}
/**
* _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
* @oh: struct omap_hwmod * to deassert hardreset
* @ohri: hardreset line data
*
* Call omap4_prminst_deassert_hardreset() with parameters extracted
* from the hwmod @oh and the hardreset line data @ohri. Only
* intended for use as an soc_ops function pointer. Passes along the
* return value from omap4_prminst_deassert_hardreset(). XXX This
* function is scheduled for removal when the PRM code is moved into
* drivers/.
*/
static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
struct omap_hwmod_rst_info *ohri)
{
if (!oh->clkdm)
return -EINVAL;
if (ohri->st_shift)
pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
oh->name, ohri->name);
return omap4_prminst_deassert_hardreset(ohri->rst_shift,
oh->clkdm->pwrdm.ptr->prcm_partition,
oh->clkdm->pwrdm.ptr->prcm_offs,
oh->prcm.omap4.rstctrl_offs);
}
/**
* _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
* @oh: struct omap_hwmod * to test hardreset
* @ohri: hardreset line data
*
* Call omap4_prminst_is_hardreset_asserted() with parameters
* extracted from the hwmod @oh and the hardreset line data @ohri.
* Only intended for use as an soc_ops function pointer. Passes along
* the return value from omap4_prminst_is_hardreset_asserted(). XXX
* This function is scheduled for removal when the PRM code is moved
* into drivers/.
*/
static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
struct omap_hwmod_rst_info *ohri)
{
if (!oh->clkdm)
return -EINVAL;
return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
oh->clkdm->pwrdm.ptr->prcm_partition,
oh->clkdm->pwrdm.ptr->prcm_offs,
oh->prcm.omap4.rstctrl_offs);
}
/* Public functions */
u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
@ -2563,12 +2709,18 @@ int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
*
* Intended to be called early in boot before the clock framework is
* initialized. If @ois is not null, will register all omap_hwmods
* listed in @ois that are valid for this chip. Returns 0.
* listed in @ois that are valid for this chip. Returns -EINVAL if
* omap_hwmod_init() hasn't been called before calling this function,
* -ENOMEM if the link memory area can't be allocated, or 0 upon
* success.
*/
int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
{
int r, i;
if (!inited)
return -EINVAL;
if (!ois)
return 0;
@ -3401,3 +3553,32 @@ int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
return 0;
}
/**
* omap_hwmod_init - initialize the hwmod code
*
* Sets up some function pointers needed by the hwmod code to operate on the
* currently-booted SoC. Intended to be called once during kernel init
* before any hwmods are registered. No return value.
*/
void __init omap_hwmod_init(void)
{
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
soc_ops.wait_target_ready = _omap2_wait_target_ready;
soc_ops.assert_hardreset = _omap2_assert_hardreset;
soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
} else if (cpu_is_omap44xx()) {
soc_ops.enable_module = _omap4_enable_module;
soc_ops.disable_module = _omap4_disable_module;
soc_ops.wait_target_ready = _omap4_wait_target_ready;
soc_ops.assert_hardreset = _omap4_assert_hardreset;
soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
soc_ops.init_clkdm = _init_clkdm;
} else {
WARN(1, "omap_hwmod: unknown SoC type\n");
}
inited = true;
}

10
arch/arm/mach-omap2/omap_hwmod_2420_data.c
View File

@ -192,6 +192,11 @@ static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = {
.name = "mcbsp",
};
static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = {
{ .role = "pad_fck", .clk = "mcbsp_clks" },
{ .role = "prcm_fck", .clk = "func_96m_ck" },
};
/* mcbsp1 */
static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = {
{ .name = "tx", .irq = 59 },
@ -214,6 +219,8 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
},
},
.opt_clks = mcbsp_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* mcbsp2 */
@ -238,6 +245,8 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
},
},
.opt_clks = mcbsp_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
static struct omap_hwmod_class_sysconfig omap2420_msdi_sysc = {
@ -585,5 +594,6 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
int __init omap2420_hwmod_init(void)
{
omap_hwmod_init();
return omap_hwmod_register_links(omap2420_hwmod_ocp_ifs);
}

16
arch/arm/mach-omap2/omap_hwmod_2430_data.c
View File

@ -296,6 +296,11 @@ static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = {
.rev = MCBSP_CONFIG_TYPE2,
};
static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = {
{ .role = "pad_fck", .clk = "mcbsp_clks" },
{ .role = "prcm_fck", .clk = "func_96m_ck" },
};
/* mcbsp1 */
static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = {
{ .name = "tx", .irq = 59 },
@ -320,6 +325,8 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
},
},
.opt_clks = mcbsp_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* mcbsp2 */
@ -345,6 +352,8 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
},
},
.opt_clks = mcbsp_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* mcbsp3 */
@ -370,6 +379,8 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = {
.idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT,
},
},
.opt_clks = mcbsp_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* mcbsp4 */
@ -401,6 +412,8 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = {
.idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT,
},
},
.opt_clks = mcbsp_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* mcbsp5 */
@ -432,6 +445,8 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = {
.idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT,
},
},
.opt_clks = mcbsp_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* MMC/SD/SDIO common */
@ -938,5 +953,6 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {
int __init omap2430_hwmod_init(void)
{
omap_hwmod_init();
return omap_hwmod_register_links(omap2430_hwmod_ocp_ifs);
}

23
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
View File

@ -1074,6 +1074,17 @@ static struct omap_hwmod_class omap3xxx_mcbsp_hwmod_class = {
.rev = MCBSP_CONFIG_TYPE3,
};
/* McBSP functional clock mapping */
static struct omap_hwmod_opt_clk mcbsp15_opt_clks[] = {
{ .role = "pad_fck", .clk = "mcbsp_clks" },
{ .role = "prcm_fck", .clk = "core_96m_fck" },
};
static struct omap_hwmod_opt_clk mcbsp234_opt_clks[] = {
{ .role = "pad_fck", .clk = "mcbsp_clks" },
{ .role = "prcm_fck", .clk = "per_96m_fck" },
};
/* mcbsp1 */
static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = {
{ .name = "common", .irq = 16 },
@ -1097,6 +1108,8 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
.idlest_idle_bit = OMAP3430_ST_MCBSP1_SHIFT,
},
},
.opt_clks = mcbsp15_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp15_opt_clks),
};
/* mcbsp2 */
@ -1126,6 +1139,8 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
.idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT,
},
},
.opt_clks = mcbsp234_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks),
.dev_attr = &omap34xx_mcbsp2_dev_attr,
};
@ -1156,6 +1171,8 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
.idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT,
},
},
.opt_clks = mcbsp234_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks),
.dev_attr = &omap34xx_mcbsp3_dev_attr,
};
@ -1188,6 +1205,8 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
.idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT,
},
},
.opt_clks = mcbsp234_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks),
};
/* mcbsp5 */
@ -1219,6 +1238,8 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {
.idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT,
},
},
.opt_clks = mcbsp15_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp15_opt_clks),
};
/* 'mcbsp sidetone' class */
@ -3283,6 +3304,8 @@ int __init omap3xxx_hwmod_init(void)
struct omap_hwmod_ocp_if **h = NULL;
unsigned int rev;
omap_hwmod_init();
/* Register hwmod links common to all OMAP3 */
r = omap_hwmod_register_links(omap3xxx_hwmod_ocp_ifs);
if (r < 0)

4
arch/arm/mach-omap2/omap_hwmod_44xx_data.c
View File

@ -2540,14 +2540,12 @@ static struct omap_hwmod omap44xx_prcm_mpu_hwmod = {
static struct omap_hwmod omap44xx_cm_core_aon_hwmod = {
.name = "cm_core_aon",
.class = &omap44xx_prcm_hwmod_class,
.clkdm_name = "cm_clkdm",
};
/* cm_core */
static struct omap_hwmod omap44xx_cm_core_hwmod = {
.name = "cm_core",
.class = &omap44xx_prcm_hwmod_class,
.clkdm_name = "cm_clkdm",
};
/* prm */
@ -2564,7 +2562,6 @@ static struct omap_hwmod_rst_info omap44xx_prm_resets[] = {
static struct omap_hwmod omap44xx_prm_hwmod = {
.name = "prm",
.class = &omap44xx_prcm_hwmod_class,
.clkdm_name = "prm_clkdm",
.mpu_irqs = omap44xx_prm_irqs,
.rst_lines = omap44xx_prm_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_prm_resets),
@ -6144,6 +6141,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
int __init omap44xx_hwmod_init(void)
{
omap_hwmod_init();
return omap_hwmod_register_links(omap44xx_hwmod_ocp_ifs);
}

3
arch/arm/plat-omap/include/plat/dsp.h
View File

@ -18,6 +18,9 @@ struct omap_dsp_platform_data {
u32 (*dsp_cm_read)(s16 , u16);
u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16);
void (*set_bootaddr)(u32);
void (*set_bootmode)(u8);
phys_addr_t phys_mempool_base;
phys_addr_t phys_mempool_size;
};

2
arch/arm/plat-omap/include/plat/omap_hwmod.h
View File

@ -629,6 +629,8 @@ int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx);
extern void __init omap_hwmod_init(void);
/*
* Chip variant-specific hwmod init routines - XXX should be converted
* to use initcalls once the initial boot ordering is straightened out