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drm/i915/dsb: s/dsb/dsb_color_vblank/
We'll soon utilize several DSBs during the commit. To that end rename the current crtc_state->dsb to crtc_state->dsb_color_vblank to better reflect its role (color managemnent stuff programmed during vblank). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240624191032.27333-14-ville.syrjala@linux.intel.com Reviewed-by: Animesh Manna <animesh.manna@intel.com>
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@ -276,7 +276,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
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crtc_state->do_async_flip = false;
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crtc_state->fb_bits = 0;
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crtc_state->update_planes = 0;
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crtc_state->dsb = NULL;
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crtc_state->dsb_color_vblank = NULL;
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return &crtc_state->uapi;
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}
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@ -310,7 +310,7 @@ intel_crtc_destroy_state(struct drm_crtc *crtc,
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{
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struct intel_crtc_state *crtc_state = to_intel_crtc_state(state);
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drm_WARN_ON(crtc->dev, crtc_state->dsb);
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drm_WARN_ON(crtc->dev, crtc_state->dsb_color_vblank);
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__drm_atomic_helper_crtc_destroy_state(&crtc_state->uapi);
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intel_crtc_free_hw_state(crtc_state);
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@ -1313,8 +1313,8 @@ static void ilk_lut_write(const struct intel_crtc_state *crtc_state,
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{
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struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
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if (crtc_state->dsb)
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intel_dsb_reg_write(crtc_state->dsb, reg, val);
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if (crtc_state->dsb_color_vblank)
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intel_dsb_reg_write(crtc_state->dsb_color_vblank, reg, val);
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else
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intel_de_write_fw(i915, reg, val);
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}
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@ -1337,15 +1337,15 @@ static void ilk_load_lut_8(const struct intel_crtc_state *crtc_state,
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* unless we either write each entry twice,
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* or use non-posted writes
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*/
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if (crtc_state->dsb)
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intel_dsb_nonpost_start(crtc_state->dsb);
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if (crtc_state->dsb_color_vblank)
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intel_dsb_nonpost_start(crtc_state->dsb_color_vblank);
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for (i = 0; i < 256; i++)
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ilk_lut_write(crtc_state, LGC_PALETTE(pipe, i),
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i9xx_lut_8(&lut[i]));
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if (crtc_state->dsb)
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intel_dsb_nonpost_end(crtc_state->dsb);
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if (crtc_state->dsb_color_vblank)
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intel_dsb_nonpost_end(crtc_state->dsb_color_vblank);
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}
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static void ilk_load_lut_10(const struct intel_crtc_state *crtc_state,
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@ -1870,7 +1870,7 @@ void intel_color_load_luts(const struct intel_crtc_state *crtc_state)
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{
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struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
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if (crtc_state->dsb)
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if (crtc_state->dsb_color_vblank)
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return;
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i915->display.funcs.color->load_luts(crtc_state);
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@ -1890,8 +1890,8 @@ void intel_color_commit_arm(const struct intel_crtc_state *crtc_state)
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i915->display.funcs.color->color_commit_arm(crtc_state);
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if (crtc_state->dsb)
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intel_dsb_commit(crtc_state->dsb, true);
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if (crtc_state->dsb_color_vblank)
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intel_dsb_commit(crtc_state->dsb_color_vblank, true);
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}
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void intel_color_post_update(const struct intel_crtc_state *crtc_state)
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@ -1919,33 +1919,33 @@ void intel_color_prepare_commit(struct intel_atomic_state *state,
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if (!crtc_state->pre_csc_lut && !crtc_state->post_csc_lut)
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return;
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crtc_state->dsb = intel_dsb_prepare(state, crtc, INTEL_DSB_0, 1024);
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if (!crtc_state->dsb)
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crtc_state->dsb_color_vblank = intel_dsb_prepare(state, crtc, INTEL_DSB_0, 1024);
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if (!crtc_state->dsb_color_vblank)
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return;
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i915->display.funcs.color->load_luts(crtc_state);
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intel_dsb_finish(crtc_state->dsb);
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intel_dsb_finish(crtc_state->dsb_color_vblank);
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}
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void intel_color_cleanup_commit(struct intel_crtc_state *crtc_state)
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{
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if (!crtc_state->dsb)
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if (!crtc_state->dsb_color_vblank)
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return;
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intel_dsb_cleanup(crtc_state->dsb);
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crtc_state->dsb = NULL;
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intel_dsb_cleanup(crtc_state->dsb_color_vblank);
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crtc_state->dsb_color_vblank = NULL;
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}
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void intel_color_wait_commit(const struct intel_crtc_state *crtc_state)
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{
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if (crtc_state->dsb)
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intel_dsb_wait(crtc_state->dsb);
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if (crtc_state->dsb_color_vblank)
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intel_dsb_wait(crtc_state->dsb_color_vblank);
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}
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bool intel_color_uses_dsb(const struct intel_crtc_state *crtc_state)
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{
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return crtc_state->dsb;
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return crtc_state->dsb_color_vblank;
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}
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static bool intel_can_preload_luts(struct intel_atomic_state *state,
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@ -7513,7 +7513,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
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*
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* FIXME get rid of this funny new->old swapping
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*/
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old_crtc_state->dsb = fetch_and_zero(&new_crtc_state->dsb);
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old_crtc_state->dsb_color_vblank = fetch_and_zero(&new_crtc_state->dsb_color_vblank);
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}
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/* Underruns don't always raise interrupts, so check manually */
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@ -1396,8 +1396,8 @@ struct intel_crtc_state {
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/* Only valid on TGL+ */
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enum transcoder mst_master_transcoder;
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/* For DSB related info */
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struct intel_dsb *dsb;
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/* For DSB based color LUT updates */
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struct intel_dsb *dsb_color_vblank;
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u32 psr2_man_track_ctl;
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