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Merge branch 'for-next/esr-elx-64-bit' into for-next/core
* for-next/esr-elx-64-bit: : Treat ESR_ELx as a 64-bit register. KVM: arm64: uapi: Add kvm_debug_exit_arch.hsr_high KVM: arm64: Treat ESR_EL2 as a 64-bit register arm64: Treat ESR_ELx as a 64-bit register arm64: compat: Do not treat syscall number as ESR_ELx for a bad syscall arm64: Make ESR_ELx_xVC_IMM_MASK compatible with assembly
This commit is contained in:
Catalin Marinas
commit
0616ea3f1b
@ -5713,6 +5713,8 @@ affect the device's behavior. Current defined flags::
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#define KVM_RUN_X86_SMM (1 << 0)
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/* x86, set if bus lock detected in VM */
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#define KVM_RUN_BUS_LOCK (1 << 1)
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/* arm64, set for KVM_EXIT_DEBUG */
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#define KVM_DEBUG_ARCH_HSR_HIGH_VALID (1 << 0)
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::
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@ -64,7 +64,7 @@ struct task_struct;
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struct step_hook {
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struct list_head node;
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int (*fn)(struct pt_regs *regs, unsigned int esr);
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int (*fn)(struct pt_regs *regs, unsigned long esr);
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};
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void register_user_step_hook(struct step_hook *hook);
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@ -75,7 +75,7 @@ void unregister_kernel_step_hook(struct step_hook *hook);
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struct break_hook {
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struct list_head node;
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int (*fn)(struct pt_regs *regs, unsigned int esr);
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int (*fn)(struct pt_regs *regs, unsigned long esr);
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u16 imm;
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u16 mask; /* These bits are ignored when comparing with imm */
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};
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@ -138,7 +138,7 @@
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#define ESR_ELx_WFx_ISS_TI (UL(1) << 0)
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#define ESR_ELx_WFx_ISS_WFI (UL(0) << 0)
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#define ESR_ELx_WFx_ISS_WFE (UL(1) << 0)
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#define ESR_ELx_xVC_IMM_MASK ((1UL << 16) - 1)
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#define ESR_ELx_xVC_IMM_MASK ((UL(1) << 16) - 1)
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#define DISR_EL1_IDS (UL(1) << 24)
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/*
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@ -341,14 +341,14 @@
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#ifndef __ASSEMBLY__
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#include <asm/types.h>
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static inline bool esr_is_data_abort(u32 esr)
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static inline bool esr_is_data_abort(unsigned long esr)
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{
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const u32 ec = ESR_ELx_EC(esr);
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const unsigned long ec = ESR_ELx_EC(esr);
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return ec == ESR_ELx_EC_DABT_LOW || ec == ESR_ELx_EC_DABT_CUR;
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}
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const char *esr_get_class_string(u32 esr);
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const char *esr_get_class_string(unsigned long esr);
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#endif /* __ASSEMBLY */
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#endif /* __ASM_ESR_H */
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@ -19,9 +19,9 @@
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#define __exception_irq_entry __kprobes
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#endif
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static inline u32 disr_to_esr(u64 disr)
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static inline unsigned long disr_to_esr(u64 disr)
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{
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unsigned int esr = ESR_ELx_EC_SERROR << ESR_ELx_EC_SHIFT;
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unsigned long esr = ESR_ELx_EC_SERROR << ESR_ELx_EC_SHIFT;
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if ((disr & DISR_EL1_IDS) == 0)
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esr |= (disr & DISR_EL1_ESR_MASK);
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@ -57,24 +57,24 @@ asmlinkage void call_on_irq_stack(struct pt_regs *regs,
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void (*func)(struct pt_regs *));
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asmlinkage void asm_exit_to_user_mode(struct pt_regs *regs);
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void do_mem_abort(unsigned long far, unsigned int esr, struct pt_regs *regs);
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void do_mem_abort(unsigned long far, unsigned long esr, struct pt_regs *regs);
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void do_undefinstr(struct pt_regs *regs);
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void do_bti(struct pt_regs *regs);
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void do_debug_exception(unsigned long addr_if_watchpoint, unsigned int esr,
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void do_debug_exception(unsigned long addr_if_watchpoint, unsigned long esr,
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struct pt_regs *regs);
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void do_fpsimd_acc(unsigned int esr, struct pt_regs *regs);
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void do_sve_acc(unsigned int esr, struct pt_regs *regs);
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void do_sme_acc(unsigned int esr, struct pt_regs *regs);
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void do_fpsimd_exc(unsigned int esr, struct pt_regs *regs);
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void do_sysinstr(unsigned int esr, struct pt_regs *regs);
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void do_sp_pc_abort(unsigned long addr, unsigned int esr, struct pt_regs *regs);
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void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr);
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void do_cp15instr(unsigned int esr, struct pt_regs *regs);
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void do_fpsimd_acc(unsigned long esr, struct pt_regs *regs);
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void do_sve_acc(unsigned long esr, struct pt_regs *regs);
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void do_sme_acc(unsigned long esr, struct pt_regs *regs);
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void do_fpsimd_exc(unsigned long esr, struct pt_regs *regs);
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void do_sysinstr(unsigned long esr, struct pt_regs *regs);
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void do_sp_pc_abort(unsigned long addr, unsigned long esr, struct pt_regs *regs);
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void bad_el0_sync(struct pt_regs *regs, int reason, unsigned long esr);
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void do_cp15instr(unsigned long esr, struct pt_regs *regs);
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void do_el0_svc(struct pt_regs *regs);
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void do_el0_svc_compat(struct pt_regs *regs);
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void do_ptrauth_fault(struct pt_regs *regs, unsigned int esr);
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void do_serror(struct pt_regs *regs, unsigned int esr);
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void do_ptrauth_fault(struct pt_regs *regs, unsigned long esr);
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void do_serror(struct pt_regs *regs, unsigned long esr);
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void do_notify_resume(struct pt_regs *regs, unsigned long thread_flags);
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void panic_bad_stack(struct pt_regs *regs, unsigned int esr, unsigned long far);
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void panic_bad_stack(struct pt_regs *regs, unsigned long esr, unsigned long far);
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#endif /* __ASM_EXCEPTION_H */
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@ -235,14 +235,14 @@ static inline bool vcpu_mode_priv(const struct kvm_vcpu *vcpu)
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return mode != PSR_MODE_EL0t;
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}
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static __always_inline u32 kvm_vcpu_get_esr(const struct kvm_vcpu *vcpu)
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static __always_inline u64 kvm_vcpu_get_esr(const struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.fault.esr_el2;
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}
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static __always_inline int kvm_vcpu_get_condition(const struct kvm_vcpu *vcpu)
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{
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u32 esr = kvm_vcpu_get_esr(vcpu);
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u64 esr = kvm_vcpu_get_esr(vcpu);
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if (esr & ESR_ELx_CV)
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return (esr & ESR_ELx_COND_MASK) >> ESR_ELx_COND_SHIFT;
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@ -373,7 +373,7 @@ static __always_inline bool kvm_vcpu_abt_issea(const struct kvm_vcpu *vcpu)
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static __always_inline int kvm_vcpu_sys_get_rt(struct kvm_vcpu *vcpu)
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{
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u32 esr = kvm_vcpu_get_esr(vcpu);
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u64 esr = kvm_vcpu_get_esr(vcpu);
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return ESR_ELx_SYS64_ISS_RT(esr);
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}
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@ -153,7 +153,7 @@ struct kvm_arch {
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};
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struct kvm_vcpu_fault_info {
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u32 esr_el2; /* Hyp Syndrom Register */
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u64 esr_el2; /* Hyp Syndrom Register */
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u64 far_el2; /* Hyp Fault Address Register */
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u64 hpfar_el2; /* Hyp IPA Fault Address Register */
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u64 disr_el1; /* Deferred [SError] Status Register */
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@ -14,7 +14,7 @@
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* Was this synchronous external abort a RAS notification?
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* Returns '0' for errors handled by some RAS subsystem, or -ENOENT.
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*/
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static inline int kvm_handle_guest_sea(phys_addr_t addr, unsigned int esr)
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static inline int kvm_handle_guest_sea(phys_addr_t addr, u64 esr)
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{
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/* apei_claim_sea(NULL) expects to mask interrupts itself */
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lockdep_assert_irqs_enabled();
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@ -23,9 +23,9 @@ void die(const char *msg, struct pt_regs *regs, int err);
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struct siginfo;
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void arm64_notify_die(const char *str, struct pt_regs *regs,
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int signo, int sicode, unsigned long far,
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int err);
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unsigned long err);
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void hook_debug_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
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void hook_debug_fault_code(int nr, int (*fn)(unsigned long, unsigned long,
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struct pt_regs *),
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int sig, int code, const char *name);
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@ -24,7 +24,7 @@ struct undef_hook {
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void register_undef_hook(struct undef_hook *hook);
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void unregister_undef_hook(struct undef_hook *hook);
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void force_signal_inject(int signal, int code, unsigned long address, unsigned int err);
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void force_signal_inject(int signal, int code, unsigned long address, unsigned long err);
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void arm64_notify_segfault(unsigned long addr);
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void arm64_force_sig_fault(int signo, int code, unsigned long far, const char *str);
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void arm64_force_sig_mceerr(int code, unsigned long far, short lsb, const char *str);
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@ -57,7 +57,7 @@ static inline int in_entry_text(unsigned long ptr)
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* errors share the same encoding as an all-zeros encoding from a CPU that
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* doesn't support RAS.
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*/
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static inline bool arm64_is_ras_serror(u32 esr)
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static inline bool arm64_is_ras_serror(unsigned long esr)
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{
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WARN_ON(preemptible());
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@ -77,9 +77,9 @@ static inline bool arm64_is_ras_serror(u32 esr)
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* We treat them as Uncontainable.
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* Non-RAS SError's are reported as Uncontained/Uncategorized.
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*/
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static inline u32 arm64_ras_serror_get_severity(u32 esr)
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static inline unsigned long arm64_ras_serror_get_severity(unsigned long esr)
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{
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u32 aet = esr & ESR_ELx_AET;
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unsigned long aet = esr & ESR_ELx_AET;
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if (!arm64_is_ras_serror(esr)) {
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/* Not a RAS error, we can't interpret the ESR. */
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@ -98,6 +98,6 @@ static inline u32 arm64_ras_serror_get_severity(u32 esr)
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return aet;
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}
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bool arm64_is_fatal_ras_serror(struct pt_regs *regs, unsigned int esr);
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void __noreturn arm64_serror_panic(struct pt_regs *regs, u32 esr);
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bool arm64_is_fatal_ras_serror(struct pt_regs *regs, unsigned long esr);
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void __noreturn arm64_serror_panic(struct pt_regs *regs, unsigned long esr);
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#endif
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@ -139,8 +139,10 @@ struct kvm_guest_debug_arch {
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__u64 dbg_wvr[KVM_ARM_MAX_DBG_REGS];
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};
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#define KVM_DEBUG_ARCH_HSR_HIGH_VALID (1 << 0)
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struct kvm_debug_exit_arch {
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__u32 hsr;
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__u32 hsr_high; /* ESR_EL2[61:32] */
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__u64 far; /* used for watchpoints */
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};
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@ -202,7 +202,7 @@ void unregister_kernel_step_hook(struct step_hook *hook)
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* So we call all the registered handlers, until the right handler is
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* found which returns zero.
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*/
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static int call_step_hook(struct pt_regs *regs, unsigned int esr)
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static int call_step_hook(struct pt_regs *regs, unsigned long esr)
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{
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struct step_hook *hook;
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struct list_head *list;
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@ -238,7 +238,7 @@ static void send_user_sigtrap(int si_code)
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"User debug trap");
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}
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static int single_step_handler(unsigned long unused, unsigned int esr,
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static int single_step_handler(unsigned long unused, unsigned long esr,
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struct pt_regs *regs)
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{
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bool handler_found = false;
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@ -299,11 +299,11 @@ void unregister_kernel_break_hook(struct break_hook *hook)
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unregister_debug_hook(&hook->node);
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}
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static int call_break_hook(struct pt_regs *regs, unsigned int esr)
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static int call_break_hook(struct pt_regs *regs, unsigned long esr)
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{
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struct break_hook *hook;
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struct list_head *list;
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int (*fn)(struct pt_regs *regs, unsigned int esr) = NULL;
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int (*fn)(struct pt_regs *regs, unsigned long esr) = NULL;
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list = user_mode(regs) ? &user_break_hook : &kernel_break_hook;
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@ -312,7 +312,7 @@ static int call_break_hook(struct pt_regs *regs, unsigned int esr)
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* entirely not preemptible, and we can use rcu list safely here.
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*/
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list_for_each_entry_rcu(hook, list, node) {
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unsigned int comment = esr & ESR_ELx_BRK64_ISS_COMMENT_MASK;
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unsigned long comment = esr & ESR_ELx_BRK64_ISS_COMMENT_MASK;
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if ((comment & ~hook->mask) == hook->imm)
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fn = hook->fn;
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@ -322,7 +322,7 @@ static int call_break_hook(struct pt_regs *regs, unsigned int esr)
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}
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NOKPROBE_SYMBOL(call_break_hook);
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static int brk_handler(unsigned long unused, unsigned int esr,
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static int brk_handler(unsigned long unused, unsigned long esr,
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struct pt_regs *regs)
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{
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if (call_break_hook(regs, esr) == DBG_HOOK_HANDLED)
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@ -282,13 +282,13 @@ extern void (*handle_arch_irq)(struct pt_regs *);
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extern void (*handle_arch_fiq)(struct pt_regs *);
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static void noinstr __panic_unhandled(struct pt_regs *regs, const char *vector,
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unsigned int esr)
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unsigned long esr)
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{
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arm64_enter_nmi(regs);
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console_verbose();
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pr_crit("Unhandled %s exception on CPU%d, ESR 0x%08x -- %s\n",
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pr_crit("Unhandled %s exception on CPU%d, ESR 0x%016lx -- %s\n",
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vector, smp_processor_id(), esr,
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esr_get_class_string(esr));
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@ -829,7 +829,7 @@ UNHANDLED(el0t, 32, error)
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#ifdef CONFIG_VMAP_STACK
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asmlinkage void noinstr handle_bad_stack(struct pt_regs *regs)
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{
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unsigned int esr = read_sysreg(esr_el1);
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unsigned long esr = read_sysreg(esr_el1);
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unsigned long far = read_sysreg(far_el1);
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arm64_enter_nmi(regs);
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@ -1381,7 +1381,7 @@ static void sve_init_regs(void)
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* would have disabled the SVE access trap for userspace during
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* ret_to_user, making an SVE access trap impossible in that case.
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*/
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void do_sve_acc(unsigned int esr, struct pt_regs *regs)
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void do_sve_acc(unsigned long esr, struct pt_regs *regs)
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{
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/* Even if we chose not to use SVE, the hardware could still trap: */
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if (unlikely(!system_supports_sve()) || WARN_ON(is_compat_task())) {
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@ -1423,7 +1423,7 @@ void do_sve_acc(unsigned int esr, struct pt_regs *regs)
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* would have disabled the SME access trap for userspace during
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* ret_to_user, making an SVE access trap impossible in that case.
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*/
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void do_sme_acc(unsigned int esr, struct pt_regs *regs)
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void do_sme_acc(unsigned long esr, struct pt_regs *regs)
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{
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/* Even if we chose not to use SME, the hardware could still trap: */
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if (unlikely(!system_supports_sme()) || WARN_ON(is_compat_task())) {
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@ -1478,7 +1478,7 @@ void do_sme_acc(unsigned int esr, struct pt_regs *regs)
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/*
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* Trapped FP/ASIMD access.
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*/
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void do_fpsimd_acc(unsigned int esr, struct pt_regs *regs)
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void do_fpsimd_acc(unsigned long esr, struct pt_regs *regs)
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{
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/* TODO: implement lazy context saving/restoring */
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WARN_ON(1);
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@ -1487,7 +1487,7 @@ void do_fpsimd_acc(unsigned int esr, struct pt_regs *regs)
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/*
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* Raise a SIGFPE for the current process.
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*/
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void do_fpsimd_exc(unsigned int esr, struct pt_regs *regs)
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void do_fpsimd_exc(unsigned long esr, struct pt_regs *regs)
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{
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unsigned int si_code = FPE_FLTUNK;
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@ -617,7 +617,7 @@ NOKPROBE_SYMBOL(toggle_bp_registers);
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/*
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* Debug exception handlers.
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*/
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static int breakpoint_handler(unsigned long unused, unsigned int esr,
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static int breakpoint_handler(unsigned long unused, unsigned long esr,
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struct pt_regs *regs)
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{
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int i, step = 0, *kernel_step;
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@ -751,7 +751,7 @@ static int watchpoint_report(struct perf_event *wp, unsigned long addr,
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return step;
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}
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static int watchpoint_handler(unsigned long addr, unsigned int esr,
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static int watchpoint_handler(unsigned long addr, unsigned long esr,
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struct pt_regs *regs)
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{
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int i, step = 0, *kernel_step, access, closest_match = 0;
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@ -232,14 +232,14 @@ int kgdb_arch_handle_exception(int exception_vector, int signo,
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return err;
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}
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static int kgdb_brk_fn(struct pt_regs *regs, unsigned int esr)
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static int kgdb_brk_fn(struct pt_regs *regs, unsigned long esr)
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{
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kgdb_handle_exception(1, SIGTRAP, 0, regs);
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return DBG_HOOK_HANDLED;
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}
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NOKPROBE_SYMBOL(kgdb_brk_fn)
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static int kgdb_compiled_brk_fn(struct pt_regs *regs, unsigned int esr)
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static int kgdb_compiled_brk_fn(struct pt_regs *regs, unsigned long esr)
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{
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compiled_break = 1;
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kgdb_handle_exception(1, SIGTRAP, 0, regs);
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@ -248,7 +248,7 @@ static int kgdb_compiled_brk_fn(struct pt_regs *regs, unsigned int esr)
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}
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NOKPROBE_SYMBOL(kgdb_compiled_brk_fn);
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static int kgdb_step_brk_fn(struct pt_regs *regs, unsigned int esr)
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static int kgdb_step_brk_fn(struct pt_regs *regs, unsigned long esr)
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{
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if (!kgdb_single_step)
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return DBG_HOOK_ERROR;
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||||
@ -335,7 +335,7 @@ static void __kprobes kprobe_handler(struct pt_regs *regs)
|
||||
}
|
||||
|
||||
static int __kprobes
|
||||
kprobe_breakpoint_ss_handler(struct pt_regs *regs, unsigned int esr)
|
||||
kprobe_breakpoint_ss_handler(struct pt_regs *regs, unsigned long esr)
|
||||
{
|
||||
struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
|
||||
unsigned long addr = instruction_pointer(regs);
|
||||
@ -359,7 +359,7 @@ static struct break_hook kprobes_break_ss_hook = {
|
||||
};
|
||||
|
||||
static int __kprobes
|
||||
kprobe_breakpoint_handler(struct pt_regs *regs, unsigned int esr)
|
||||
kprobe_breakpoint_handler(struct pt_regs *regs, unsigned long esr)
|
||||
{
|
||||
kprobe_handler(regs);
|
||||
return DBG_HOOK_HANDLED;
|
||||
|
||||
@ -166,7 +166,7 @@ int arch_uprobe_exception_notify(struct notifier_block *self,
|
||||
}
|
||||
|
||||
static int uprobe_breakpoint_handler(struct pt_regs *regs,
|
||||
unsigned int esr)
|
||||
unsigned long esr)
|
||||
{
|
||||
if (uprobe_pre_sstep_notifier(regs))
|
||||
return DBG_HOOK_HANDLED;
|
||||
@ -175,7 +175,7 @@ static int uprobe_breakpoint_handler(struct pt_regs *regs,
|
||||
}
|
||||
|
||||
static int uprobe_single_step_handler(struct pt_regs *regs,
|
||||
unsigned int esr)
|
||||
unsigned long esr)
|
||||
{
|
||||
struct uprobe_task *utask = current->utask;
|
||||
|
||||
|
||||
@ -113,6 +113,6 @@ long compat_arm_syscall(struct pt_regs *regs, int scno)
|
||||
addr = instruction_pointer(regs) - (compat_thumb_mode(regs) ? 2 : 4);
|
||||
|
||||
arm64_notify_die("Oops - bad compat syscall(2)", regs,
|
||||
SIGILL, ILL_ILLTRP, addr, scno);
|
||||
SIGILL, ILL_ILLTRP, addr, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -242,7 +242,7 @@ static void arm64_show_signal(int signo, const char *str)
|
||||
static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL,
|
||||
DEFAULT_RATELIMIT_BURST);
|
||||
struct task_struct *tsk = current;
|
||||
unsigned int esr = tsk->thread.fault_code;
|
||||
unsigned long esr = tsk->thread.fault_code;
|
||||
struct pt_regs *regs = task_pt_regs(tsk);
|
||||
|
||||
/* Leave if the signal won't be shown */
|
||||
@ -253,7 +253,7 @@ static void arm64_show_signal(int signo, const char *str)
|
||||
|
||||
pr_info("%s[%d]: unhandled exception: ", tsk->comm, task_pid_nr(tsk));
|
||||
if (esr)
|
||||
pr_cont("%s, ESR 0x%08x, ", esr_get_class_string(esr), esr);
|
||||
pr_cont("%s, ESR 0x%016lx, ", esr_get_class_string(esr), esr);
|
||||
|
||||
pr_cont("%s", str);
|
||||
print_vma_addr(KERN_CONT " in ", regs->pc);
|
||||
@ -287,7 +287,7 @@ void arm64_force_sig_ptrace_errno_trap(int errno, unsigned long far,
|
||||
|
||||
void arm64_notify_die(const char *str, struct pt_regs *regs,
|
||||
int signo, int sicode, unsigned long far,
|
||||
int err)
|
||||
unsigned long err)
|
||||
{
|
||||
if (user_mode(regs)) {
|
||||
WARN_ON(regs != current_pt_regs());
|
||||
@ -439,7 +439,7 @@ exit:
|
||||
return fn ? fn(regs, instr) : 1;
|
||||
}
|
||||
|
||||
void force_signal_inject(int signal, int code, unsigned long address, unsigned int err)
|
||||
void force_signal_inject(int signal, int code, unsigned long address, unsigned long err)
|
||||
{
|
||||
const char *desc;
|
||||
struct pt_regs *regs = current_pt_regs();
|
||||
@ -506,7 +506,7 @@ void do_bti(struct pt_regs *regs)
|
||||
}
|
||||
NOKPROBE_SYMBOL(do_bti);
|
||||
|
||||
void do_ptrauth_fault(struct pt_regs *regs, unsigned int esr)
|
||||
void do_ptrauth_fault(struct pt_regs *regs, unsigned long esr)
|
||||
{
|
||||
/*
|
||||
* Unexpected FPAC exception or pointer authentication failure in
|
||||
@ -532,7 +532,7 @@ NOKPROBE_SYMBOL(do_ptrauth_fault);
|
||||
uaccess_ttbr0_disable(); \
|
||||
}
|
||||
|
||||
static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs)
|
||||
static void user_cache_maint_handler(unsigned long esr, struct pt_regs *regs)
|
||||
{
|
||||
unsigned long tagged_address, address;
|
||||
int rt = ESR_ELx_SYS64_ISS_RT(esr);
|
||||
@ -572,7 +572,7 @@ static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs)
|
||||
arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
|
||||
}
|
||||
|
||||
static void ctr_read_handler(unsigned int esr, struct pt_regs *regs)
|
||||
static void ctr_read_handler(unsigned long esr, struct pt_regs *regs)
|
||||
{
|
||||
int rt = ESR_ELx_SYS64_ISS_RT(esr);
|
||||
unsigned long val = arm64_ftr_reg_user_value(&arm64_ftr_reg_ctrel0);
|
||||
@ -591,7 +591,7 @@ static void ctr_read_handler(unsigned int esr, struct pt_regs *regs)
|
||||
arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
|
||||
}
|
||||
|
||||
static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs)
|
||||
static void cntvct_read_handler(unsigned long esr, struct pt_regs *regs)
|
||||
{
|
||||
int rt = ESR_ELx_SYS64_ISS_RT(esr);
|
||||
|
||||
@ -599,7 +599,7 @@ static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs)
|
||||
arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
|
||||
}
|
||||
|
||||
static void cntfrq_read_handler(unsigned int esr, struct pt_regs *regs)
|
||||
static void cntfrq_read_handler(unsigned long esr, struct pt_regs *regs)
|
||||
{
|
||||
int rt = ESR_ELx_SYS64_ISS_RT(esr);
|
||||
|
||||
@ -607,7 +607,7 @@ static void cntfrq_read_handler(unsigned int esr, struct pt_regs *regs)
|
||||
arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
|
||||
}
|
||||
|
||||
static void mrs_handler(unsigned int esr, struct pt_regs *regs)
|
||||
static void mrs_handler(unsigned long esr, struct pt_regs *regs)
|
||||
{
|
||||
u32 sysreg, rt;
|
||||
|
||||
@ -618,15 +618,15 @@ static void mrs_handler(unsigned int esr, struct pt_regs *regs)
|
||||
force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc, 0);
|
||||
}
|
||||
|
||||
static void wfi_handler(unsigned int esr, struct pt_regs *regs)
|
||||
static void wfi_handler(unsigned long esr, struct pt_regs *regs)
|
||||
{
|
||||
arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
|
||||
}
|
||||
|
||||
struct sys64_hook {
|
||||
unsigned int esr_mask;
|
||||
unsigned int esr_val;
|
||||
void (*handler)(unsigned int esr, struct pt_regs *regs);
|
||||
unsigned long esr_mask;
|
||||
unsigned long esr_val;
|
||||
void (*handler)(unsigned long esr, struct pt_regs *regs);
|
||||
};
|
||||
|
||||
static const struct sys64_hook sys64_hooks[] = {
|
||||
@ -675,7 +675,7 @@ static const struct sys64_hook sys64_hooks[] = {
|
||||
};
|
||||
|
||||
#ifdef CONFIG_COMPAT
|
||||
static bool cp15_cond_valid(unsigned int esr, struct pt_regs *regs)
|
||||
static bool cp15_cond_valid(unsigned long esr, struct pt_regs *regs)
|
||||
{
|
||||
int cond;
|
||||
|
||||
@ -695,7 +695,7 @@ static bool cp15_cond_valid(unsigned int esr, struct pt_regs *regs)
|
||||
return aarch32_opcode_cond_checks[cond](regs->pstate);
|
||||
}
|
||||
|
||||
static void compat_cntfrq_read_handler(unsigned int esr, struct pt_regs *regs)
|
||||
static void compat_cntfrq_read_handler(unsigned long esr, struct pt_regs *regs)
|
||||
{
|
||||
int reg = (esr & ESR_ELx_CP15_32_ISS_RT_MASK) >> ESR_ELx_CP15_32_ISS_RT_SHIFT;
|
||||
|
||||
@ -712,7 +712,7 @@ static const struct sys64_hook cp15_32_hooks[] = {
|
||||
{},
|
||||
};
|
||||
|
||||
static void compat_cntvct_read_handler(unsigned int esr, struct pt_regs *regs)
|
||||
static void compat_cntvct_read_handler(unsigned long esr, struct pt_regs *regs)
|
||||
{
|
||||
int rt = (esr & ESR_ELx_CP15_64_ISS_RT_MASK) >> ESR_ELx_CP15_64_ISS_RT_SHIFT;
|
||||
int rt2 = (esr & ESR_ELx_CP15_64_ISS_RT2_MASK) >> ESR_ELx_CP15_64_ISS_RT2_SHIFT;
|
||||
@ -737,7 +737,7 @@ static const struct sys64_hook cp15_64_hooks[] = {
|
||||
{},
|
||||
};
|
||||
|
||||
void do_cp15instr(unsigned int esr, struct pt_regs *regs)
|
||||
void do_cp15instr(unsigned long esr, struct pt_regs *regs)
|
||||
{
|
||||
const struct sys64_hook *hook, *hook_base;
|
||||
|
||||
@ -778,7 +778,7 @@ void do_cp15instr(unsigned int esr, struct pt_regs *regs)
|
||||
NOKPROBE_SYMBOL(do_cp15instr);
|
||||
#endif
|
||||
|
||||
void do_sysinstr(unsigned int esr, struct pt_regs *regs)
|
||||
void do_sysinstr(unsigned long esr, struct pt_regs *regs)
|
||||
{
|
||||
const struct sys64_hook *hook;
|
||||
|
||||
@ -843,7 +843,7 @@ static const char *esr_class_str[] = {
|
||||
[ESR_ELx_EC_BRK64] = "BRK (AArch64)",
|
||||
};
|
||||
|
||||
const char *esr_get_class_string(u32 esr)
|
||||
const char *esr_get_class_string(unsigned long esr)
|
||||
{
|
||||
return esr_class_str[ESR_ELx_EC(esr)];
|
||||
}
|
||||
@ -852,7 +852,7 @@ const char *esr_get_class_string(u32 esr)
|
||||
* bad_el0_sync handles unexpected, but potentially recoverable synchronous
|
||||
* exceptions taken from EL0.
|
||||
*/
|
||||
void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr)
|
||||
void bad_el0_sync(struct pt_regs *regs, int reason, unsigned long esr)
|
||||
{
|
||||
unsigned long pc = instruction_pointer(regs);
|
||||
|
||||
@ -868,7 +868,7 @@ void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr)
|
||||
DEFINE_PER_CPU(unsigned long [OVERFLOW_STACK_SIZE/sizeof(long)], overflow_stack)
|
||||
__aligned(16);
|
||||
|
||||
void panic_bad_stack(struct pt_regs *regs, unsigned int esr, unsigned long far)
|
||||
void panic_bad_stack(struct pt_regs *regs, unsigned long esr, unsigned long far)
|
||||
{
|
||||
unsigned long tsk_stk = (unsigned long)current->stack;
|
||||
unsigned long irq_stk = (unsigned long)this_cpu_read(irq_stack_ptr);
|
||||
@ -877,7 +877,7 @@ void panic_bad_stack(struct pt_regs *regs, unsigned int esr, unsigned long far)
|
||||
console_verbose();
|
||||
pr_emerg("Insufficient stack space to handle exception!");
|
||||
|
||||
pr_emerg("ESR: 0x%08x -- %s\n", esr, esr_get_class_string(esr));
|
||||
pr_emerg("ESR: 0x%016lx -- %s\n", esr, esr_get_class_string(esr));
|
||||
pr_emerg("FAR: 0x%016lx\n", far);
|
||||
|
||||
pr_emerg("Task stack: [0x%016lx..0x%016lx]\n",
|
||||
@ -898,11 +898,11 @@ void panic_bad_stack(struct pt_regs *regs, unsigned int esr, unsigned long far)
|
||||
}
|
||||
#endif
|
||||
|
||||
void __noreturn arm64_serror_panic(struct pt_regs *regs, u32 esr)
|
||||
void __noreturn arm64_serror_panic(struct pt_regs *regs, unsigned long esr)
|
||||
{
|
||||
console_verbose();
|
||||
|
||||
pr_crit("SError Interrupt on CPU%d, code 0x%08x -- %s\n",
|
||||
pr_crit("SError Interrupt on CPU%d, code 0x%016lx -- %s\n",
|
||||
smp_processor_id(), esr, esr_get_class_string(esr));
|
||||
if (regs)
|
||||
__show_regs(regs);
|
||||
@ -913,9 +913,9 @@ void __noreturn arm64_serror_panic(struct pt_regs *regs, u32 esr)
|
||||
unreachable();
|
||||
}
|
||||
|
||||
bool arm64_is_fatal_ras_serror(struct pt_regs *regs, unsigned int esr)
|
||||
bool arm64_is_fatal_ras_serror(struct pt_regs *regs, unsigned long esr)
|
||||
{
|
||||
u32 aet = arm64_ras_serror_get_severity(esr);
|
||||
unsigned long aet = arm64_ras_serror_get_severity(esr);
|
||||
|
||||
switch (aet) {
|
||||
case ESR_ELx_AET_CE: /* corrected error */
|
||||
@ -945,7 +945,7 @@ bool arm64_is_fatal_ras_serror(struct pt_regs *regs, unsigned int esr)
|
||||
}
|
||||
}
|
||||
|
||||
void do_serror(struct pt_regs *regs, unsigned int esr)
|
||||
void do_serror(struct pt_regs *regs, unsigned long esr)
|
||||
{
|
||||
/* non-RAS errors are not containable */
|
||||
if (!arm64_is_ras_serror(esr) || arm64_is_fatal_ras_serror(regs, esr))
|
||||
@ -966,7 +966,7 @@ int is_valid_bugaddr(unsigned long addr)
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int bug_handler(struct pt_regs *regs, unsigned int esr)
|
||||
static int bug_handler(struct pt_regs *regs, unsigned long esr)
|
||||
{
|
||||
switch (report_bug(regs->pc, regs)) {
|
||||
case BUG_TRAP_TYPE_BUG:
|
||||
@ -991,7 +991,7 @@ static struct break_hook bug_break_hook = {
|
||||
.imm = BUG_BRK_IMM,
|
||||
};
|
||||
|
||||
static int reserved_fault_handler(struct pt_regs *regs, unsigned int esr)
|
||||
static int reserved_fault_handler(struct pt_regs *regs, unsigned long esr)
|
||||
{
|
||||
pr_err("%s generated an invalid instruction at %pS!\n",
|
||||
"Kernel text patching",
|
||||
@ -1013,7 +1013,7 @@ static struct break_hook fault_break_hook = {
|
||||
#define KASAN_ESR_SIZE_MASK 0x0f
|
||||
#define KASAN_ESR_SIZE(esr) (1 << ((esr) & KASAN_ESR_SIZE_MASK))
|
||||
|
||||
static int kasan_handler(struct pt_regs *regs, unsigned int esr)
|
||||
static int kasan_handler(struct pt_regs *regs, unsigned long esr)
|
||||
{
|
||||
bool recover = esr & KASAN_ESR_RECOVER;
|
||||
bool write = esr & KASAN_ESR_WRITE;
|
||||
@ -1056,11 +1056,11 @@ static struct break_hook kasan_break_hook = {
|
||||
* Initial handler for AArch64 BRK exceptions
|
||||
* This handler only used until debug_traps_init().
|
||||
*/
|
||||
int __init early_brk64(unsigned long addr, unsigned int esr,
|
||||
int __init early_brk64(unsigned long addr, unsigned long esr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
#ifdef CONFIG_KASAN_SW_TAGS
|
||||
unsigned int comment = esr & ESR_ELx_BRK64_ISS_COMMENT_MASK;
|
||||
unsigned long comment = esr & ESR_ELx_BRK64_ISS_COMMENT_MASK;
|
||||
|
||||
if ((comment & ~KASAN_BRK_MASK) == KASAN_BRK_IMM)
|
||||
return kasan_handler(regs, esr) != DBG_HOOK_HANDLED;
|
||||
|
||||
@ -783,6 +783,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
|
||||
|
||||
ret = 1;
|
||||
run->exit_reason = KVM_EXIT_UNKNOWN;
|
||||
run->flags = 0;
|
||||
while (ret > 0) {
|
||||
/*
|
||||
* Check conditions before entering the guest
|
||||
|
||||
@ -26,7 +26,7 @@
|
||||
|
||||
typedef int (*exit_handle_fn)(struct kvm_vcpu *);
|
||||
|
||||
static void kvm_handle_guest_serror(struct kvm_vcpu *vcpu, u32 esr)
|
||||
static void kvm_handle_guest_serror(struct kvm_vcpu *vcpu, u64 esr)
|
||||
{
|
||||
if (!arm64_is_ras_serror(esr) || arm64_is_fatal_ras_serror(NULL, esr))
|
||||
kvm_inject_vabt(vcpu);
|
||||
@ -117,10 +117,12 @@ static int kvm_handle_wfx(struct kvm_vcpu *vcpu)
|
||||
static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
struct kvm_run *run = vcpu->run;
|
||||
u32 esr = kvm_vcpu_get_esr(vcpu);
|
||||
u64 esr = kvm_vcpu_get_esr(vcpu);
|
||||
|
||||
run->exit_reason = KVM_EXIT_DEBUG;
|
||||
run->debug.arch.hsr = esr;
|
||||
run->debug.arch.hsr = lower_32_bits(esr);
|
||||
run->debug.arch.hsr_high = upper_32_bits(esr);
|
||||
run->flags = KVM_DEBUG_ARCH_HSR_HIGH_VALID;
|
||||
|
||||
if (ESR_ELx_EC(esr) == ESR_ELx_EC_WATCHPT_LOW)
|
||||
run->debug.arch.far = vcpu->arch.fault.far_el2;
|
||||
@ -130,9 +132,9 @@ static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu)
|
||||
|
||||
static int kvm_handle_unknown_ec(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
u32 esr = kvm_vcpu_get_esr(vcpu);
|
||||
u64 esr = kvm_vcpu_get_esr(vcpu);
|
||||
|
||||
kvm_pr_unimpl("Unknown exception class: esr: %#08x -- %s\n",
|
||||
kvm_pr_unimpl("Unknown exception class: esr: %#016llx -- %s\n",
|
||||
esr, esr_get_class_string(esr));
|
||||
|
||||
kvm_inject_undefined(vcpu);
|
||||
@ -187,7 +189,7 @@ static exit_handle_fn arm_exit_handlers[] = {
|
||||
|
||||
static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
u32 esr = kvm_vcpu_get_esr(vcpu);
|
||||
u64 esr = kvm_vcpu_get_esr(vcpu);
|
||||
u8 esr_ec = ESR_ELx_EC(esr);
|
||||
|
||||
return arm_exit_handlers[esr_ec];
|
||||
@ -334,6 +336,6 @@ void __noreturn __cold nvhe_hyp_panic_handler(u64 esr, u64 spsr,
|
||||
*/
|
||||
kvm_err("Hyp Offset: 0x%llx\n", hyp_offset);
|
||||
|
||||
panic("HYP panic:\nPS:%08llx PC:%016llx ESR:%08llx\nFAR:%016llx HPFAR:%016llx PAR:%016llx\nVCPU:%016lx\n",
|
||||
panic("HYP panic:\nPS:%08llx PC:%016llx ESR:%016llx\nFAR:%016llx HPFAR:%016llx PAR:%016llx\nVCPU:%016lx\n",
|
||||
spsr, elr_virt, esr, far, hpfar, par, vcpu);
|
||||
}
|
||||
|
||||
@ -266,7 +266,7 @@ static inline bool handle_tx2_tvm(struct kvm_vcpu *vcpu)
|
||||
return true;
|
||||
}
|
||||
|
||||
static inline bool esr_is_ptrauth_trap(u32 esr)
|
||||
static inline bool esr_is_ptrauth_trap(u64 esr)
|
||||
{
|
||||
switch (esr_sys64_to_sysreg(esr)) {
|
||||
case SYS_APIAKEYLO_EL1:
|
||||
|
||||
@ -33,7 +33,7 @@ u64 id_aa64mmfr2_el1_sys_val;
|
||||
*/
|
||||
static void inject_undef64(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
u32 esr = (ESR_ELx_EC_UNKNOWN << ESR_ELx_EC_SHIFT);
|
||||
u64 esr = (ESR_ELx_EC_UNKNOWN << ESR_ELx_EC_SHIFT);
|
||||
|
||||
*vcpu_pc(vcpu) = read_sysreg_el2(SYS_ELR);
|
||||
*vcpu_cpsr(vcpu) = read_sysreg_el2(SYS_SPSR);
|
||||
|
||||
@ -473,7 +473,7 @@ static int __vgic_v3_bpr_min(void)
|
||||
|
||||
static int __vgic_v3_get_group(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
u32 esr = kvm_vcpu_get_esr(vcpu);
|
||||
u64 esr = kvm_vcpu_get_esr(vcpu);
|
||||
u8 crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT;
|
||||
|
||||
return crm != 8;
|
||||
@ -1016,7 +1016,7 @@ static void __vgic_v3_write_ctlr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
|
||||
int __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
int rt;
|
||||
u32 esr;
|
||||
u64 esr;
|
||||
u32 vmcr;
|
||||
void (*fn)(struct kvm_vcpu *, u32, int);
|
||||
bool is_read;
|
||||
|
||||
@ -18,7 +18,7 @@ static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr
|
||||
{
|
||||
unsigned long cpsr = *vcpu_cpsr(vcpu);
|
||||
bool is_aarch32 = vcpu_mode_is_32bit(vcpu);
|
||||
u32 esr = 0;
|
||||
u64 esr = 0;
|
||||
|
||||
vcpu->arch.flags |= (KVM_ARM64_EXCEPT_AA64_EL1 |
|
||||
KVM_ARM64_EXCEPT_AA64_ELx_SYNC |
|
||||
@ -50,7 +50,7 @@ static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr
|
||||
|
||||
static void inject_undef64(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
u32 esr = (ESR_ELx_EC_UNKNOWN << ESR_ELx_EC_SHIFT);
|
||||
u64 esr = (ESR_ELx_EC_UNKNOWN << ESR_ELx_EC_SHIFT);
|
||||
|
||||
vcpu->arch.flags |= (KVM_ARM64_EXCEPT_AA64_EL1 |
|
||||
KVM_ARM64_EXCEPT_AA64_ELx_SYNC |
|
||||
|
||||
@ -2311,7 +2311,7 @@ static int kvm_handle_cp_64(struct kvm_vcpu *vcpu,
|
||||
size_t nr_global)
|
||||
{
|
||||
struct sys_reg_params params;
|
||||
u32 esr = kvm_vcpu_get_esr(vcpu);
|
||||
u64 esr = kvm_vcpu_get_esr(vcpu);
|
||||
int Rt = kvm_vcpu_sys_get_rt(vcpu);
|
||||
int Rt2 = (esr >> 10) & 0x1f;
|
||||
|
||||
@ -2361,7 +2361,7 @@ static int kvm_handle_cp_32(struct kvm_vcpu *vcpu,
|
||||
size_t nr_global)
|
||||
{
|
||||
struct sys_reg_params params;
|
||||
u32 esr = kvm_vcpu_get_esr(vcpu);
|
||||
u64 esr = kvm_vcpu_get_esr(vcpu);
|
||||
int Rt = kvm_vcpu_sys_get_rt(vcpu);
|
||||
|
||||
params.CRm = (esr >> 1) & 0xf;
|
||||
|
||||
@ -43,7 +43,7 @@
|
||||
#include <asm/traps.h>
|
||||
|
||||
struct fault_info {
|
||||
int (*fn)(unsigned long far, unsigned int esr,
|
||||
int (*fn)(unsigned long far, unsigned long esr,
|
||||
struct pt_regs *regs);
|
||||
int sig;
|
||||
int code;
|
||||
@ -53,17 +53,17 @@ struct fault_info {
|
||||
static const struct fault_info fault_info[];
|
||||
static struct fault_info debug_fault_info[];
|
||||
|
||||
static inline const struct fault_info *esr_to_fault_info(unsigned int esr)
|
||||
static inline const struct fault_info *esr_to_fault_info(unsigned long esr)
|
||||
{
|
||||
return fault_info + (esr & ESR_ELx_FSC);
|
||||
}
|
||||
|
||||
static inline const struct fault_info *esr_to_debug_fault_info(unsigned int esr)
|
||||
static inline const struct fault_info *esr_to_debug_fault_info(unsigned long esr)
|
||||
{
|
||||
return debug_fault_info + DBG_ESR_EVT(esr);
|
||||
}
|
||||
|
||||
static void data_abort_decode(unsigned int esr)
|
||||
static void data_abort_decode(unsigned long esr)
|
||||
{
|
||||
pr_alert("Data abort info:\n");
|
||||
|
||||
@ -85,11 +85,11 @@ static void data_abort_decode(unsigned int esr)
|
||||
(esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT);
|
||||
}
|
||||
|
||||
static void mem_abort_decode(unsigned int esr)
|
||||
static void mem_abort_decode(unsigned long esr)
|
||||
{
|
||||
pr_alert("Mem abort info:\n");
|
||||
|
||||
pr_alert(" ESR = 0x%08x\n", esr);
|
||||
pr_alert(" ESR = 0x%016lx\n", esr);
|
||||
pr_alert(" EC = 0x%02lx: %s, IL = %u bits\n",
|
||||
ESR_ELx_EC(esr), esr_get_class_string(esr),
|
||||
(esr & ESR_ELx_IL) ? 32 : 16);
|
||||
@ -99,7 +99,7 @@ static void mem_abort_decode(unsigned int esr)
|
||||
pr_alert(" EA = %lu, S1PTW = %lu\n",
|
||||
(esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT,
|
||||
(esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT);
|
||||
pr_alert(" FSC = 0x%02x: %s\n", (esr & ESR_ELx_FSC),
|
||||
pr_alert(" FSC = 0x%02lx: %s\n", (esr & ESR_ELx_FSC),
|
||||
esr_to_fault_info(esr)->name);
|
||||
|
||||
if (esr_is_data_abort(esr))
|
||||
@ -229,20 +229,20 @@ int ptep_set_access_flags(struct vm_area_struct *vma,
|
||||
return 1;
|
||||
}
|
||||
|
||||
static bool is_el1_instruction_abort(unsigned int esr)
|
||||
static bool is_el1_instruction_abort(unsigned long esr)
|
||||
{
|
||||
return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR;
|
||||
}
|
||||
|
||||
static bool is_el1_data_abort(unsigned int esr)
|
||||
static bool is_el1_data_abort(unsigned long esr)
|
||||
{
|
||||
return ESR_ELx_EC(esr) == ESR_ELx_EC_DABT_CUR;
|
||||
}
|
||||
|
||||
static inline bool is_el1_permission_fault(unsigned long addr, unsigned int esr,
|
||||
static inline bool is_el1_permission_fault(unsigned long addr, unsigned long esr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
unsigned int fsc_type = esr & ESR_ELx_FSC_TYPE;
|
||||
unsigned long fsc_type = esr & ESR_ELx_FSC_TYPE;
|
||||
|
||||
if (!is_el1_data_abort(esr) && !is_el1_instruction_abort(esr))
|
||||
return false;
|
||||
@ -258,7 +258,7 @@ static inline bool is_el1_permission_fault(unsigned long addr, unsigned int esr,
|
||||
}
|
||||
|
||||
static bool __kprobes is_spurious_el1_translation_fault(unsigned long addr,
|
||||
unsigned int esr,
|
||||
unsigned long esr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
unsigned long flags;
|
||||
@ -290,7 +290,7 @@ static bool __kprobes is_spurious_el1_translation_fault(unsigned long addr,
|
||||
}
|
||||
|
||||
static void die_kernel_fault(const char *msg, unsigned long addr,
|
||||
unsigned int esr, struct pt_regs *regs)
|
||||
unsigned long esr, struct pt_regs *regs)
|
||||
{
|
||||
bust_spinlocks(1);
|
||||
|
||||
@ -308,7 +308,7 @@ static void die_kernel_fault(const char *msg, unsigned long addr,
|
||||
}
|
||||
|
||||
#ifdef CONFIG_KASAN_HW_TAGS
|
||||
static void report_tag_fault(unsigned long addr, unsigned int esr,
|
||||
static void report_tag_fault(unsigned long addr, unsigned long esr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
/*
|
||||
@ -320,11 +320,11 @@ static void report_tag_fault(unsigned long addr, unsigned int esr,
|
||||
}
|
||||
#else
|
||||
/* Tag faults aren't enabled without CONFIG_KASAN_HW_TAGS. */
|
||||
static inline void report_tag_fault(unsigned long addr, unsigned int esr,
|
||||
static inline void report_tag_fault(unsigned long addr, unsigned long esr,
|
||||
struct pt_regs *regs) { }
|
||||
#endif
|
||||
|
||||
static void do_tag_recovery(unsigned long addr, unsigned int esr,
|
||||
static void do_tag_recovery(unsigned long addr, unsigned long esr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
|
||||
@ -340,9 +340,9 @@ static void do_tag_recovery(unsigned long addr, unsigned int esr,
|
||||
isb();
|
||||
}
|
||||
|
||||
static bool is_el1_mte_sync_tag_check_fault(unsigned int esr)
|
||||
static bool is_el1_mte_sync_tag_check_fault(unsigned long esr)
|
||||
{
|
||||
unsigned int fsc = esr & ESR_ELx_FSC;
|
||||
unsigned long fsc = esr & ESR_ELx_FSC;
|
||||
|
||||
if (!is_el1_data_abort(esr))
|
||||
return false;
|
||||
@ -353,7 +353,7 @@ static bool is_el1_mte_sync_tag_check_fault(unsigned int esr)
|
||||
return false;
|
||||
}
|
||||
|
||||
static void __do_kernel_fault(unsigned long addr, unsigned int esr,
|
||||
static void __do_kernel_fault(unsigned long addr, unsigned long esr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
const char *msg;
|
||||
@ -394,7 +394,7 @@ static void __do_kernel_fault(unsigned long addr, unsigned int esr,
|
||||
die_kernel_fault(msg, addr, esr, regs);
|
||||
}
|
||||
|
||||
static void set_thread_esr(unsigned long address, unsigned int esr)
|
||||
static void set_thread_esr(unsigned long address, unsigned long esr)
|
||||
{
|
||||
current->thread.fault_address = address;
|
||||
|
||||
@ -442,7 +442,7 @@ static void set_thread_esr(unsigned long address, unsigned int esr)
|
||||
* exception level). Fail safe by not providing an ESR
|
||||
* context record at all.
|
||||
*/
|
||||
WARN(1, "ESR 0x%x is not DABT or IABT from EL0\n", esr);
|
||||
WARN(1, "ESR 0x%lx is not DABT or IABT from EL0\n", esr);
|
||||
esr = 0;
|
||||
break;
|
||||
}
|
||||
@ -451,7 +451,7 @@ static void set_thread_esr(unsigned long address, unsigned int esr)
|
||||
current->thread.fault_code = esr;
|
||||
}
|
||||
|
||||
static void do_bad_area(unsigned long far, unsigned int esr,
|
||||
static void do_bad_area(unsigned long far, unsigned long esr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
unsigned long addr = untagged_addr(far);
|
||||
@ -502,7 +502,7 @@ static vm_fault_t __do_page_fault(struct mm_struct *mm, unsigned long addr,
|
||||
return handle_mm_fault(vma, addr, mm_flags, regs);
|
||||
}
|
||||
|
||||
static bool is_el0_instruction_abort(unsigned int esr)
|
||||
static bool is_el0_instruction_abort(unsigned long esr)
|
||||
{
|
||||
return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW;
|
||||
}
|
||||
@ -511,12 +511,12 @@ static bool is_el0_instruction_abort(unsigned int esr)
|
||||
* Note: not valid for EL1 DC IVAC, but we never use that such that it
|
||||
* should fault. EL0 cannot issue DC IVAC (undef).
|
||||
*/
|
||||
static bool is_write_abort(unsigned int esr)
|
||||
static bool is_write_abort(unsigned long esr)
|
||||
{
|
||||
return (esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM);
|
||||
}
|
||||
|
||||
static int __kprobes do_page_fault(unsigned long far, unsigned int esr,
|
||||
static int __kprobes do_page_fault(unsigned long far, unsigned long esr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
const struct fault_info *inf;
|
||||
@ -672,7 +672,7 @@ no_context:
|
||||
}
|
||||
|
||||
static int __kprobes do_translation_fault(unsigned long far,
|
||||
unsigned int esr,
|
||||
unsigned long esr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
unsigned long addr = untagged_addr(far);
|
||||
@ -684,19 +684,19 @@ static int __kprobes do_translation_fault(unsigned long far,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int do_alignment_fault(unsigned long far, unsigned int esr,
|
||||
static int do_alignment_fault(unsigned long far, unsigned long esr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
do_bad_area(far, esr, regs);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int do_bad(unsigned long far, unsigned int esr, struct pt_regs *regs)
|
||||
static int do_bad(unsigned long far, unsigned long esr, struct pt_regs *regs)
|
||||
{
|
||||
return 1; /* "fault" */
|
||||
}
|
||||
|
||||
static int do_sea(unsigned long far, unsigned int esr, struct pt_regs *regs)
|
||||
static int do_sea(unsigned long far, unsigned long esr, struct pt_regs *regs)
|
||||
{
|
||||
const struct fault_info *inf;
|
||||
unsigned long siaddr;
|
||||
@ -726,7 +726,7 @@ static int do_sea(unsigned long far, unsigned int esr, struct pt_regs *regs)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int do_tag_check_fault(unsigned long far, unsigned int esr,
|
||||
static int do_tag_check_fault(unsigned long far, unsigned long esr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
/*
|
||||
@ -806,7 +806,7 @@ static const struct fault_info fault_info[] = {
|
||||
{ do_bad, SIGKILL, SI_KERNEL, "unknown 63" },
|
||||
};
|
||||
|
||||
void do_mem_abort(unsigned long far, unsigned int esr, struct pt_regs *regs)
|
||||
void do_mem_abort(unsigned long far, unsigned long esr, struct pt_regs *regs)
|
||||
{
|
||||
const struct fault_info *inf = esr_to_fault_info(esr);
|
||||
unsigned long addr = untagged_addr(far);
|
||||
@ -826,14 +826,14 @@ void do_mem_abort(unsigned long far, unsigned int esr, struct pt_regs *regs)
|
||||
}
|
||||
NOKPROBE_SYMBOL(do_mem_abort);
|
||||
|
||||
void do_sp_pc_abort(unsigned long addr, unsigned int esr, struct pt_regs *regs)
|
||||
void do_sp_pc_abort(unsigned long addr, unsigned long esr, struct pt_regs *regs)
|
||||
{
|
||||
arm64_notify_die("SP/PC alignment exception", regs, SIGBUS, BUS_ADRALN,
|
||||
addr, esr);
|
||||
}
|
||||
NOKPROBE_SYMBOL(do_sp_pc_abort);
|
||||
|
||||
int __init early_brk64(unsigned long addr, unsigned int esr,
|
||||
int __init early_brk64(unsigned long addr, unsigned long esr,
|
||||
struct pt_regs *regs);
|
||||
|
||||
/*
|
||||
@ -853,7 +853,7 @@ static struct fault_info __refdata debug_fault_info[] = {
|
||||
};
|
||||
|
||||
void __init hook_debug_fault_code(int nr,
|
||||
int (*fn)(unsigned long, unsigned int, struct pt_regs *),
|
||||
int (*fn)(unsigned long, unsigned long, struct pt_regs *),
|
||||
int sig, int code, const char *name)
|
||||
{
|
||||
BUG_ON(nr < 0 || nr >= ARRAY_SIZE(debug_fault_info));
|
||||
@ -886,7 +886,7 @@ static void debug_exception_exit(struct pt_regs *regs)
|
||||
}
|
||||
NOKPROBE_SYMBOL(debug_exception_exit);
|
||||
|
||||
void do_debug_exception(unsigned long addr_if_watchpoint, unsigned int esr,
|
||||
void do_debug_exception(unsigned long addr_if_watchpoint, unsigned long esr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
const struct fault_info *inf = esr_to_debug_fault_info(esr);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user