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i2c: tegra: Add missing kerneldoc for some fields
Not all fields were properly documented. Add kerneldoc for the missing fields to prevent the build from flagging them. Reported-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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@ -154,6 +154,16 @@ enum msg_end_type {
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* @clk_divisor_std_fast_mode: Clock divisor in standard/fast mode. It is
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* applicable if there is no fast clock source i.e. single clock
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* source.
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* @clk_divisor_fast_plus_mode: Clock divisor in fast mode plus. It is
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* applicable if there is no fast clock source (i.e. single
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* clock source).
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* @has_multi_master_mode: The I2C controller supports running in single-master
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* or multi-master mode.
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* @has_slcg_override_reg: The I2C controller supports a register that
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* overrides the second level clock gating.
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* @has_mst_fifo: The I2C controller contains the new MST FIFO interface that
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* provides additional features and allows for longer messages to
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* be transferred in one go.
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*/
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struct tegra_i2c_hw_feature {
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bool has_continue_xfer_support;
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@ -175,9 +185,11 @@ struct tegra_i2c_hw_feature {
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* @adapter: core I2C layer adapter information
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* @div_clk: clock reference for div clock of I2C controller
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* @fast_clk: clock reference for fast clock of I2C controller
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* @rst: reset control for the I2C controller
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* @base: ioremapped registers cookie
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* @cont_id: I2C controller ID, used for packet header
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* @irq: IRQ number of transfer complete interrupt
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* @irq_disabled: used to track whether or not the interrupt is enabled
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* @is_dvc: identifies the DVC I2C controller, has a different register layout
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* @msg_complete: transfer completion notifier
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* @msg_err: error code for completed message
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@ -185,6 +197,9 @@ struct tegra_i2c_hw_feature {
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* @msg_buf_remaining: size of unsent data in the message buffer
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* @msg_read: identifies read transfers
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* @bus_clk_rate: current I2C bus clock rate
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* @clk_divisor_non_hs_mode: clock divider for non-high-speed modes
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* @is_multimaster_mode: track if I2C controller is in multi-master mode
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* @xfer_lock: lock to serialize transfer submission and processing
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*/
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struct tegra_i2c_dev {
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struct device *dev;
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