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crypto: omap-aes - Support crypto engine framework
Integrate with the newly added crypto engine to make the crypto hardware engine underutilized as each block needs to be processed before the crypto hardware can start working on the next block. The requests from dm-crypt will be listed into engine queue and processed by engine automatically, so remove the 'queue' and 'queue_task' things in omap aes driver. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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0529900a01
@ -296,6 +296,7 @@ config CRYPTO_DEV_OMAP_AES
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depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
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select CRYPTO_AES
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select CRYPTO_BLKCIPHER
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select CRYPTO_ENGINE
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help
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OMAP processors have AES module accelerator. Select this if you
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want to use the OMAP module for AES algorithms.
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@ -36,6 +36,7 @@
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#include <linux/interrupt.h>
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#include <crypto/scatterwalk.h>
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#include <crypto/aes.h>
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#include <crypto/algapi.h>
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#define DST_MAXBURST 4
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#define DMA_MIN (DST_MAXBURST * sizeof(u32))
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@ -152,13 +153,10 @@ struct omap_aes_dev {
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unsigned long flags;
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int err;
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spinlock_t lock;
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struct crypto_queue queue;
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struct tasklet_struct done_task;
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struct tasklet_struct queue_task;
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struct ablkcipher_request *req;
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struct crypto_engine *engine;
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/*
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* total is used by PIO mode for book keeping so introduce
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@ -532,9 +530,7 @@ static void omap_aes_finish_req(struct omap_aes_dev *dd, int err)
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pr_debug("err: %d\n", err);
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dd->flags &= ~FLAGS_BUSY;
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req->base.complete(&req->base, err);
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crypto_finalize_request(dd->engine, req, err);
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}
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static int omap_aes_crypt_dma_stop(struct omap_aes_dev *dd)
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@ -604,34 +600,25 @@ static int omap_aes_copy_sgs(struct omap_aes_dev *dd)
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}
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static int omap_aes_handle_queue(struct omap_aes_dev *dd,
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struct ablkcipher_request *req)
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struct ablkcipher_request *req)
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{
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struct crypto_async_request *async_req, *backlog;
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struct omap_aes_ctx *ctx;
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struct omap_aes_reqctx *rctx;
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unsigned long flags;
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int err, ret = 0, len;
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spin_lock_irqsave(&dd->lock, flags);
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if (req)
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ret = ablkcipher_enqueue_request(&dd->queue, req);
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if (dd->flags & FLAGS_BUSY) {
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spin_unlock_irqrestore(&dd->lock, flags);
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return ret;
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}
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backlog = crypto_get_backlog(&dd->queue);
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async_req = crypto_dequeue_request(&dd->queue);
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if (async_req)
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dd->flags |= FLAGS_BUSY;
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spin_unlock_irqrestore(&dd->lock, flags);
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return crypto_transfer_request_to_engine(dd->engine, req);
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if (!async_req)
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return ret;
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return 0;
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}
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if (backlog)
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backlog->complete(backlog, -EINPROGRESS);
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static int omap_aes_prepare_req(struct crypto_engine *engine,
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struct ablkcipher_request *req)
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{
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struct omap_aes_ctx *ctx = crypto_ablkcipher_ctx(
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crypto_ablkcipher_reqtfm(req));
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struct omap_aes_dev *dd = omap_aes_find_dev(ctx);
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struct omap_aes_reqctx *rctx;
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int len;
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req = ablkcipher_request_cast(async_req);
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if (!dd)
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return -ENODEV;
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/* assign new request to device */
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dd->req = req;
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@ -662,16 +649,20 @@ static int omap_aes_handle_queue(struct omap_aes_dev *dd,
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dd->ctx = ctx;
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ctx->dd = dd;
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err = omap_aes_write_ctrl(dd);
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if (!err)
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err = omap_aes_crypt_dma_start(dd);
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if (err) {
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/* aes_task will not finish it, so do it here */
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omap_aes_finish_req(dd, err);
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tasklet_schedule(&dd->queue_task);
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}
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return omap_aes_write_ctrl(dd);
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}
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return ret; /* return ret, which is enqueue return value */
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static int omap_aes_crypt_req(struct crypto_engine *engine,
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struct ablkcipher_request *req)
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{
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struct omap_aes_ctx *ctx = crypto_ablkcipher_ctx(
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crypto_ablkcipher_reqtfm(req));
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struct omap_aes_dev *dd = omap_aes_find_dev(ctx);
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if (!dd)
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return -ENODEV;
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return omap_aes_crypt_dma_start(dd);
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}
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static void omap_aes_done_task(unsigned long data)
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@ -704,18 +695,10 @@ static void omap_aes_done_task(unsigned long data)
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}
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omap_aes_finish_req(dd, 0);
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omap_aes_handle_queue(dd, NULL);
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pr_debug("exit\n");
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}
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static void omap_aes_queue_task(unsigned long data)
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{
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struct omap_aes_dev *dd = (struct omap_aes_dev *)data;
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omap_aes_handle_queue(dd, NULL);
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}
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static int omap_aes_crypt(struct ablkcipher_request *req, unsigned long mode)
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{
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struct omap_aes_ctx *ctx = crypto_ablkcipher_ctx(
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@ -1175,9 +1158,6 @@ static int omap_aes_probe(struct platform_device *pdev)
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dd->dev = dev;
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platform_set_drvdata(pdev, dd);
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spin_lock_init(&dd->lock);
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crypto_init_queue(&dd->queue, OMAP_AES_QUEUE_LENGTH);
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err = (dev->of_node) ? omap_aes_get_res_of(dd, dev, &res) :
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omap_aes_get_res_pdev(dd, pdev, &res);
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if (err)
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@ -1209,7 +1189,6 @@ static int omap_aes_probe(struct platform_device *pdev)
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(reg & dd->pdata->minor_mask) >> dd->pdata->minor_shift);
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tasklet_init(&dd->done_task, omap_aes_done_task, (unsigned long)dd);
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tasklet_init(&dd->queue_task, omap_aes_queue_task, (unsigned long)dd);
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err = omap_aes_dma_init(dd);
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if (err && AES_REG_IRQ_STATUS(dd) && AES_REG_IRQ_ENABLE(dd)) {
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@ -1250,7 +1229,20 @@ static int omap_aes_probe(struct platform_device *pdev)
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}
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}
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/* Initialize crypto engine */
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dd->engine = crypto_engine_alloc_init(dev, 1);
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if (!dd->engine)
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goto err_algs;
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dd->engine->prepare_request = omap_aes_prepare_req;
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dd->engine->crypt_one_request = omap_aes_crypt_req;
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err = crypto_engine_start(dd->engine);
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if (err)
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goto err_engine;
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return 0;
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err_engine:
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crypto_engine_exit(dd->engine);
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err_algs:
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for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
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for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
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@ -1260,7 +1252,6 @@ err_algs:
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omap_aes_dma_cleanup(dd);
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err_irq:
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tasklet_kill(&dd->done_task);
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tasklet_kill(&dd->queue_task);
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pm_runtime_disable(dev);
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err_res:
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dd = NULL;
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@ -1286,8 +1277,8 @@ static int omap_aes_remove(struct platform_device *pdev)
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crypto_unregister_alg(
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&dd->pdata->algs_info[i].algs_list[j]);
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crypto_engine_exit(dd->engine);
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tasklet_kill(&dd->done_task);
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tasklet_kill(&dd->queue_task);
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omap_aes_dma_cleanup(dd);
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pm_runtime_disable(dd->dev);
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dd = NULL;
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