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[ACPI] enable C2 and C3 idle power states on SMP
http://bugzilla.kernel.org/show_bug.cgi?id=4401 Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
This commit is contained in:
Venkatesh Pallipadi
Len Brown
parent
17e9c78a75
commit
02df8b9385
@ -2,3 +2,7 @@ obj-$(CONFIG_ACPI_BOOT) := boot.o
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obj-$(CONFIG_X86_IO_APIC) += earlyquirk.o
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obj-$(CONFIG_ACPI_SLEEP) += sleep.o wakeup.o
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ifneq ($(CONFIG_ACPI_PROCESSOR),)
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obj-y += cstate.o
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endif
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103
arch/i386/kernel/acpi/cstate.c
Normal file
103
arch/i386/kernel/acpi/cstate.c
Normal file
@ -0,0 +1,103 @@
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/*
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* arch/i386/kernel/acpi/cstate.c
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*
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* Copyright (C) 2005 Intel Corporation
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* Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
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* - Added _PDC for SMP C-states on Intel CPUs
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/acpi.h>
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#include <acpi/processor.h>
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#include <asm/acpi.h>
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static void acpi_processor_power_init_intel_pdc(struct acpi_processor_power
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*pow)
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{
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struct acpi_object_list *obj_list;
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union acpi_object *obj;
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u32 *buf;
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/* allocate and initialize pdc. It will be used later. */
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obj_list = kmalloc(sizeof(struct acpi_object_list), GFP_KERNEL);
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if (!obj_list) {
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printk(KERN_ERR "Memory allocation error\n");
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return;
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}
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obj = kmalloc(sizeof(union acpi_object), GFP_KERNEL);
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if (!obj) {
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printk(KERN_ERR "Memory allocation error\n");
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kfree(obj_list);
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return;
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}
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buf = kmalloc(12, GFP_KERNEL);
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if (!buf) {
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printk(KERN_ERR "Memory allocation error\n");
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kfree(obj);
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kfree(obj_list);
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return;
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}
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buf[0] = ACPI_PDC_REVISION_ID;
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buf[1] = 1;
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buf[2] = ACPI_PDC_C_CAPABILITY_SMP;
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obj->type = ACPI_TYPE_BUFFER;
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obj->buffer.length = 12;
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obj->buffer.pointer = (u8 *) buf;
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obj_list->count = 1;
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obj_list->pointer = obj;
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pow->pdc = obj_list;
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return;
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}
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/* Initialize _PDC data based on the CPU vendor */
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void acpi_processor_power_init_pdc(struct acpi_processor_power *pow,
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unsigned int cpu)
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{
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struct cpuinfo_x86 *c = cpu_data + cpu;
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pow->pdc = NULL;
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if (c->x86_vendor == X86_VENDOR_INTEL)
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acpi_processor_power_init_intel_pdc(pow);
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return;
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}
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EXPORT_SYMBOL(acpi_processor_power_init_pdc);
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/*
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* Initialize bm_flags based on the CPU cache properties
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* On SMP it depends on cache configuration
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* - When cache is not shared among all CPUs, we flush cache
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* before entering C3.
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* - When cache is shared among all CPUs, we use bm_check
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* mechanism as in UP case
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*
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* This routine is called only after all the CPUs are online
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*/
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void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flags,
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unsigned int cpu)
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{
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struct cpuinfo_x86 *c = cpu_data + cpu;
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flags->bm_check = 0;
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if (num_online_cpus() == 1)
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flags->bm_check = 1;
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else if (c->x86_vendor == X86_VENDOR_INTEL) {
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/*
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* Today all CPUs that support C3 share cache.
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* TBD: This needs to look at cache shared map, once
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* multi-core detection patch makes to the base.
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*/
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flags->bm_check = 1;
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}
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}
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EXPORT_SYMBOL(acpi_processor_power_init_bm_check);
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@ -375,7 +375,7 @@ static int centrino_cpu_init_acpi(struct cpufreq_policy *policy)
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arg0.buffer.pointer = (u8 *) arg0_buf;
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arg0_buf[0] = ACPI_PDC_REVISION_ID;
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arg0_buf[1] = 1;
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arg0_buf[2] = ACPI_PDC_EST_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_MSR;
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arg0_buf[2] = ACPI_PDC_EST_CAPABILITY_SMP_MSR;
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p.pdc = &arg_list;
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@ -255,6 +255,43 @@ acpi_processor_errata (
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}
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/* --------------------------------------------------------------------------
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Common ACPI processor fucntions
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-------------------------------------------------------------------------- */
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/*
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* _PDC is required for a BIOS-OS handshake for most of the newer
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* ACPI processor features.
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*/
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int acpi_processor_set_pdc(struct acpi_processor *pr,
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struct acpi_object_list *pdc_in)
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{
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acpi_status status = AE_OK;
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u32 arg0_buf[3];
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union acpi_object arg0 = {ACPI_TYPE_BUFFER};
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struct acpi_object_list no_object = {1, &arg0};
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struct acpi_object_list *pdc;
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ACPI_FUNCTION_TRACE("acpi_processor_set_pdc");
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arg0.buffer.length = 12;
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arg0.buffer.pointer = (u8 *) arg0_buf;
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arg0_buf[0] = ACPI_PDC_REVISION_ID;
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arg0_buf[1] = 0;
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arg0_buf[2] = 0;
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pdc = (pdc_in) ? pdc_in : &no_object;
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status = acpi_evaluate_object(pr->handle, "_PDC", pdc, NULL);
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if ((ACPI_FAILURE(status)) && (pdc_in))
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ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Error evaluating _PDC, using legacy perf. control...\n"));
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return_VALUE(status);
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}
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/* --------------------------------------------------------------------------
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FS Interface (/proc)
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-------------------------------------------------------------------------- */
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@ -6,6 +6,8 @@
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* Copyright (C) 2004 Dominik Brodowski <linux@brodo.de>
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* Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
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* - Added processor hotplug support
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* Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
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* - Added support for C3 on SMP
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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@ -142,7 +144,7 @@ acpi_processor_power_activate (
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switch (old->type) {
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case ACPI_STATE_C3:
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/* Disable bus master reload */
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if (new->type != ACPI_STATE_C3)
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if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
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acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0, ACPI_MTX_DO_NOT_LOCK);
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break;
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}
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@ -152,7 +154,7 @@ acpi_processor_power_activate (
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switch (new->type) {
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case ACPI_STATE_C3:
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/* Enable bus master reload */
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if (old->type != ACPI_STATE_C3)
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if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
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acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1, ACPI_MTX_DO_NOT_LOCK);
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break;
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}
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@ -163,6 +165,9 @@ acpi_processor_power_activate (
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}
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static atomic_t c3_cpu_count;
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static void acpi_processor_idle (void)
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{
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struct acpi_processor *pr = NULL;
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@ -297,8 +302,22 @@ static void acpi_processor_idle (void)
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break;
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case ACPI_STATE_C3:
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/* Disable bus master arbitration */
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acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1, ACPI_MTX_DO_NOT_LOCK);
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if (pr->flags.bm_check) {
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if (atomic_inc_return(&c3_cpu_count) ==
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num_online_cpus()) {
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/*
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* All CPUs are trying to go to C3
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* Disable bus master arbitration
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*/
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acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1,
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ACPI_MTX_DO_NOT_LOCK);
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}
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} else {
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/* SMP with no shared cache... Invalidate cache */
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ACPI_FLUSH_CPU_CACHE();
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}
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/* Get start time (ticks) */
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t1 = inl(acpi_fadt.xpm_tmr_blk.address);
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/* Invoke C3 */
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@ -307,8 +326,12 @@ static void acpi_processor_idle (void)
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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/* Get end time (ticks) */
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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/* Enable bus master arbitration */
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acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0, ACPI_MTX_DO_NOT_LOCK);
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if (pr->flags.bm_check) {
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/* Enable bus master arbitration */
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atomic_dec(&c3_cpu_count);
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acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0, ACPI_MTX_DO_NOT_LOCK);
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}
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/* Re-enable interrupts */
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local_irq_enable();
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/* Compute time (ticks) that we were actually asleep */
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@ -552,9 +575,6 @@ static int acpi_processor_get_power_info_cst (struct acpi_processor *pr)
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ACPI_FUNCTION_TRACE("acpi_processor_get_power_info_cst");
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if (errata.smp)
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return_VALUE(-ENODEV);
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if (nocst)
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return_VALUE(-ENODEV);
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@ -687,13 +707,6 @@ static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
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return_VOID;
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}
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/* We're (currently) only supporting C2 on UP */
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else if (errata.smp) {
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ACPI_DEBUG_PRINT((ACPI_DB_INFO,
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"C2 not supported in SMP mode\n"));
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return_VOID;
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}
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/*
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* Otherwise we've met all of our C2 requirements.
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* Normalize the C2 latency to expidite policy
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@ -709,6 +722,8 @@ static void acpi_processor_power_verify_c3(
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struct acpi_processor *pr,
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struct acpi_processor_cx *cx)
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{
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static int bm_check_flag;
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ACPI_FUNCTION_TRACE("acpi_processor_get_power_verify_c3");
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if (!cx->address)
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@ -725,20 +740,6 @@ static void acpi_processor_power_verify_c3(
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return_VOID;
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}
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/* bus mastering control is necessary */
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else if (!pr->flags.bm_control) {
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ACPI_DEBUG_PRINT((ACPI_DB_INFO,
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"C3 support requires bus mastering control\n"));
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return_VOID;
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}
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/* We're (currently) only supporting C2 on UP */
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else if (errata.smp) {
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ACPI_DEBUG_PRINT((ACPI_DB_INFO,
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"C3 not supported in SMP mode\n"));
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return_VOID;
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}
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/*
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* PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
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* DMA transfers are used by any ISA device to avoid livelock.
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@ -752,6 +753,39 @@ static void acpi_processor_power_verify_c3(
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return_VOID;
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}
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/* All the logic here assumes flags.bm_check is same across all CPUs */
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if (!bm_check_flag) {
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/* Determine whether bm_check is needed based on CPU */
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acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
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bm_check_flag = pr->flags.bm_check;
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} else {
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pr->flags.bm_check = bm_check_flag;
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}
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if (pr->flags.bm_check) {
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printk("Disabling BM access before entering C3\n");
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/* bus mastering control is necessary */
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if (!pr->flags.bm_control) {
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ACPI_DEBUG_PRINT((ACPI_DB_INFO,
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"C3 support requires bus mastering control\n"));
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return_VOID;
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}
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} else {
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printk("Invalidating cache before entering C3\n");
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/*
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* WBINVD should be set in fadt, for C3 state to be
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* supported on when bm_check is not required.
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*/
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if (acpi_fadt.wb_invd != 1) {
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ACPI_DEBUG_PRINT((ACPI_DB_INFO,
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"Cache invalidation should work properly"
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" for C3 to be enabled on SMP systems\n"));
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return_VOID;
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}
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acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD,
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0, ACPI_MTX_DO_NOT_LOCK);
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}
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/*
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* Otherwise we've met all of our C3 requirements.
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* Normalize the C3 latency to expidite policy. Enable
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@ -760,7 +794,6 @@ static void acpi_processor_power_verify_c3(
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*/
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cx->valid = 1;
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cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
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pr->flags.bm_check = 1;
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return_VOID;
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}
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@ -848,7 +881,7 @@ int acpi_processor_cst_has_changed (struct acpi_processor *pr)
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if (!pr)
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return_VALUE(-EINVAL);
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if (errata.smp || nocst) {
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if ( nocst) {
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return_VALUE(-ENODEV);
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}
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@ -948,7 +981,6 @@ static struct file_operations acpi_processor_power_fops = {
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.release = single_release,
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};
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int acpi_processor_power_init(struct acpi_processor *pr, struct acpi_device *device)
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{
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acpi_status status = 0;
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@ -965,7 +997,10 @@ int acpi_processor_power_init(struct acpi_processor *pr, struct acpi_device *dev
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first_run++;
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}
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if (!errata.smp && (pr->id == 0) && acpi_fadt.cst_cnt && !nocst) {
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if (!pr)
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return_VALUE(-EINVAL);
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if (acpi_fadt.cst_cnt && !nocst) {
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status = acpi_os_write_port(acpi_fadt.smi_cmd, acpi_fadt.cst_cnt, 8);
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if (ACPI_FAILURE(status)) {
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ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
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@ -973,6 +1008,8 @@ int acpi_processor_power_init(struct acpi_processor *pr, struct acpi_device *dev
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}
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}
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acpi_processor_power_init_pdc(&(pr->power), pr->id);
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acpi_processor_set_pdc(pr, pr->power.pdc);
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acpi_processor_get_power_info(pr);
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/*
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@ -165,37 +165,6 @@ void acpi_processor_ppc_exit(void) {
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acpi_processor_ppc_status &= ~PPC_REGISTERED;
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}
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/*
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* when registering a cpufreq driver with this ACPI processor driver, the
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* _PCT and _PSS structures are read out and written into struct
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* acpi_processor_performance.
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*/
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static int acpi_processor_set_pdc (struct acpi_processor *pr)
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{
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acpi_status status = AE_OK;
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u32 arg0_buf[3];
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union acpi_object arg0 = {ACPI_TYPE_BUFFER};
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struct acpi_object_list no_object = {1, &arg0};
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struct acpi_object_list *pdc;
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ACPI_FUNCTION_TRACE("acpi_processor_set_pdc");
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arg0.buffer.length = 12;
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arg0.buffer.pointer = (u8 *) arg0_buf;
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arg0_buf[0] = ACPI_PDC_REVISION_ID;
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arg0_buf[1] = 0;
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arg0_buf[2] = 0;
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pdc = (pr->performance->pdc) ? pr->performance->pdc : &no_object;
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status = acpi_evaluate_object(pr->handle, "_PDC", pdc, NULL);
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if ((ACPI_FAILURE(status)) && (pr->performance->pdc))
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ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Error evaluating _PDC, using legacy perf. control...\n"));
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return_VALUE(status);
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}
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static int
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acpi_processor_get_performance_control (
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@ -357,7 +326,7 @@ acpi_processor_get_performance_info (
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if (!pr || !pr->performance || !pr->handle)
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return_VALUE(-EINVAL);
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acpi_processor_set_pdc(pr);
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acpi_processor_set_pdc(pr, pr->performance->pdc);
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status = acpi_get_handle(pr->handle, "_PCT", &handle);
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if (ACPI_FAILURE(status)) {
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29
include/acpi/pdc_intel.h
Normal file
29
include/acpi/pdc_intel.h
Normal file
@ -0,0 +1,29 @@
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/* _PDC bit definition for Intel processors */
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#ifndef __PDC_INTEL_H__
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#define __PDC_INTEL_H__
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#define ACPI_PDC_P_FFH (0x0001)
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#define ACPI_PDC_C_C1_HALT (0x0002)
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#define ACPI_PDC_T_FFH (0x0004)
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#define ACPI_PDC_SMP_C1PT (0x0008)
|
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#define ACPI_PDC_SMP_C2C3 (0x0010)
|
||||
#define ACPI_PDC_SMP_P_SWCOORD (0x0020)
|
||||
#define ACPI_PDC_SMP_C_SWCOORD (0x0040)
|
||||
#define ACPI_PDC_SMP_T_SWCOORD (0x0080)
|
||||
#define ACPI_PDC_C_C1_FFH (0x0100)
|
||||
|
||||
|
||||
#define ACPI_PDC_EST_CAPABILITY_SMP (ACPI_PDC_SMP_C1PT | \
|
||||
ACPI_PDC_C_C1_HALT)
|
||||
|
||||
#define ACPI_PDC_EST_CAPABILITY_SMP_MSR (ACPI_PDC_EST_CAPABILITY_SMP | \
|
||||
ACPI_PDC_P_FFH)
|
||||
|
||||
#define ACPI_PDC_C_CAPABILITY_SMP (ACPI_PDC_SMP_C2C3 | \
|
||||
ACPI_PDC_SMP_C1PT | \
|
||||
ACPI_PDC_C_C1_HALT)
|
||||
|
||||
#endif /* __PDC_INTEL_H__ */
|
||||
|
||||
@ -4,6 +4,8 @@
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/config.h>
|
||||
|
||||
#include <asm/acpi.h>
|
||||
|
||||
#define ACPI_PROCESSOR_BUSY_METRIC 10
|
||||
|
||||
#define ACPI_PROCESSOR_MAX_POWER 8
|
||||
@ -14,6 +16,8 @@
|
||||
#define ACPI_PROCESSOR_MAX_THROTTLE 250 /* 25% */
|
||||
#define ACPI_PROCESSOR_MAX_DUTY_WIDTH 4
|
||||
|
||||
#define ACPI_PDC_REVISION_ID 0x1
|
||||
|
||||
/* Power Management */
|
||||
|
||||
struct acpi_processor_cx;
|
||||
@ -59,6 +63,9 @@ struct acpi_processor_power {
|
||||
u32 bm_activity;
|
||||
int count;
|
||||
struct acpi_processor_cx states[ACPI_PROCESSOR_MAX_POWER];
|
||||
|
||||
/* the _PDC objects passed by the driver, if any */
|
||||
struct acpi_object_list *pdc;
|
||||
};
|
||||
|
||||
/* Performance Management */
|
||||
@ -82,8 +89,6 @@ struct acpi_processor_px {
|
||||
acpi_integer status; /* success indicator */
|
||||
};
|
||||
|
||||
#define ACPI_PDC_REVISION_ID 0x1
|
||||
|
||||
struct acpi_processor_performance {
|
||||
unsigned int state;
|
||||
unsigned int platform_limit;
|
||||
@ -179,7 +184,32 @@ int acpi_processor_notify_smm(struct module *calling_module);
|
||||
extern struct acpi_processor *processors[NR_CPUS];
|
||||
extern struct acpi_processor_errata errata;
|
||||
|
||||
int acpi_processor_set_pdc(struct acpi_processor *pr,
|
||||
struct acpi_object_list *pdc_in);
|
||||
|
||||
#ifdef ARCH_HAS_POWER_PDC_INIT
|
||||
void acpi_processor_power_init_pdc(struct acpi_processor_power *pow,
|
||||
unsigned int cpu);
|
||||
void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flags,
|
||||
unsigned int cpu);
|
||||
#else
|
||||
static inline void acpi_processor_power_init_pdc(
|
||||
struct acpi_processor_power *pow, unsigned int cpu)
|
||||
{
|
||||
pow->pdc = NULL;
|
||||
return;
|
||||
}
|
||||
|
||||
static inline void acpi_processor_power_init_bm_check(
|
||||
struct acpi_processor_flags *flags, unsigned int cpu)
|
||||
{
|
||||
flags->bm_check = 1;
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* in processor_perflib.c */
|
||||
|
||||
#ifdef CONFIG_CPU_FREQ
|
||||
void acpi_processor_ppc_init(void);
|
||||
void acpi_processor_ppc_exit(void);
|
||||
|
||||
@ -28,6 +28,8 @@
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <acpi/pdc_intel.h>
|
||||
|
||||
#include <asm/system.h> /* defines cmpxchg */
|
||||
|
||||
#define COMPILER_DEPENDENT_INT64 long long
|
||||
@ -101,12 +103,6 @@ __acpi_release_global_lock (unsigned int *lock)
|
||||
:"=r"(n_hi), "=r"(n_lo) \
|
||||
:"0"(n_hi), "1"(n_lo))
|
||||
|
||||
/*
|
||||
* Refer Intel ACPI _PDC support document for bit definitions
|
||||
*/
|
||||
#define ACPI_PDC_EST_CAPABILITY_SMP 0xa
|
||||
#define ACPI_PDC_EST_CAPABILITY_MSR 0x1
|
||||
|
||||
#ifdef CONFIG_ACPI_BOOT
|
||||
extern int acpi_lapic;
|
||||
extern int acpi_ioapic;
|
||||
@ -185,6 +181,8 @@ extern void acpi_reserve_bootmem(void);
|
||||
|
||||
extern u8 x86_acpiid_to_apicid[];
|
||||
|
||||
#define ARCH_HAS_POWER_PDC_INIT 1
|
||||
|
||||
#endif /*__KERNEL__*/
|
||||
|
||||
#endif /*_ASM_ACPI_H*/
|
||||
|
||||
@ -28,6 +28,8 @@
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <acpi/pdc_intel.h>
|
||||
|
||||
#define COMPILER_DEPENDENT_INT64 long long
|
||||
#define COMPILER_DEPENDENT_UINT64 unsigned long long
|
||||
|
||||
@ -99,12 +101,6 @@ __acpi_release_global_lock (unsigned int *lock)
|
||||
:"=r"(n_hi), "=r"(n_lo) \
|
||||
:"0"(n_hi), "1"(n_lo))
|
||||
|
||||
/*
|
||||
* Refer Intel ACPI _PDC support document for bit definitions
|
||||
*/
|
||||
#define ACPI_PDC_EST_CAPABILITY_SMP 0xa
|
||||
#define ACPI_PDC_EST_CAPABILITY_MSR 0x1
|
||||
|
||||
#ifdef CONFIG_ACPI_BOOT
|
||||
extern int acpi_lapic;
|
||||
extern int acpi_ioapic;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user