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pinctrl: samsung: support ExynosAutov9 SoC pinctrl
Add pinctrl data for ExynosAuto v9 SoC. - GPA0, GPA1: 10, External wake up interrupt - GPQ0: 2, XbootLDO, Speedy PMIC I/F - GPB0, GPB1, GPB2, GPB3: 29, I2S 7 CH - GPF0, GPF1, GPF2, GPF3,GPF4, GPF5, GPF6, GPF8: 52, FSYS - GPG0, GPG1, GPG2, GPG3: 25, GPIO x 24, SMPL_INT - GPP0, GPP1, GPP2, GPP3, GPP4, GPP5: 48, USI 12 CH Signed-off-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20211008091443.44625-2-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20211017171912.5044-1-krzysztof.kozlowski@canonical.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Chanho Park
Linus Walleij
parent
c3efe04533
commit
02725b0c89
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@ -23,6 +23,7 @@ Required Properties:
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- "samsung,exynos5433-pinctrl": for Exynos5433 compatible pin-controller.
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- "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller.
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- "samsung,exynos850-pinctrl": for Exynos850 compatible pin-controller.
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- "samsung,exynosautov9-pinctrl": for ExynosAutov9 compatible pin-controller.
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- reg: Base address of the pin controller hardware module and length of
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the address space it occupies.
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@ -538,3 +538,111 @@ const struct samsung_pinctrl_of_match_data exynos850_of_data __initconst = {
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.ctrl = exynos850_pin_ctrl,
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.num_ctrl = ARRAY_SIZE(exynos850_pin_ctrl),
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};
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/* pin banks of exynosautov9 pin-controller 0 (ALIVE) */
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static const struct samsung_pin_bank_data exynosautov9_pin_banks0[] __initconst = {
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EXYNOS850_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
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EXYNOS850_PIN_BANK_EINTW(2, 0x020, "gpa1", 0x04),
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EXYNOS850_PIN_BANK_EINTN(2, 0x040, "gpq0"),
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};
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/* pin banks of exynosautov9 pin-controller 1 (AUD) */
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static const struct samsung_pin_bank_data exynosautov9_pin_banks1[] __initconst = {
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EXYNOS850_PIN_BANK_EINTG(5, 0x000, "gpb0", 0x00),
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EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpb1", 0x04),
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EXYNOS850_PIN_BANK_EINTG(8, 0x040, "gpb2", 0x08),
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EXYNOS850_PIN_BANK_EINTG(8, 0x060, "gpb3", 0x0C),
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};
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/* pin banks of exynosautov9 pin-controller 2 (FSYS0) */
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static const struct samsung_pin_bank_data exynosautov9_pin_banks2[] __initconst = {
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EXYNOS850_PIN_BANK_EINTG(6, 0x000, "gpf0", 0x00),
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EXYNOS850_PIN_BANK_EINTG(6, 0x020, "gpf1", 0x04),
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};
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/* pin banks of exynosautov9 pin-controller 3 (FSYS1) */
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static const struct samsung_pin_bank_data exynosautov9_pin_banks3[] __initconst = {
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EXYNOS850_PIN_BANK_EINTG(6, 0x000, "gpf8", 0x00),
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};
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/* pin banks of exynosautov9 pin-controller 4 (FSYS2) */
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static const struct samsung_pin_bank_data exynosautov9_pin_banks4[] __initconst = {
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EXYNOS850_PIN_BANK_EINTG(4, 0x000, "gpf2", 0x00),
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EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpf3", 0x04),
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EXYNOS850_PIN_BANK_EINTG(7, 0x040, "gpf4", 0x08),
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EXYNOS850_PIN_BANK_EINTG(8, 0x060, "gpf5", 0x0C),
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EXYNOS850_PIN_BANK_EINTG(7, 0x080, "gpf6", 0x10),
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};
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/* pin banks of exynosautov9 pin-controller 5 (PERIC0) */
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static const struct samsung_pin_bank_data exynosautov9_pin_banks5[] __initconst = {
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EXYNOS850_PIN_BANK_EINTG(8, 0x000, "gpp0", 0x00),
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EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpp1", 0x04),
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EXYNOS850_PIN_BANK_EINTG(8, 0x040, "gpp2", 0x08),
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EXYNOS850_PIN_BANK_EINTG(5, 0x060, "gpg0", 0x0C),
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};
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/* pin banks of exynosautov9 pin-controller 6 (PERIC1) */
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static const struct samsung_pin_bank_data exynosautov9_pin_banks6[] __initconst = {
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EXYNOS850_PIN_BANK_EINTG(8, 0x000, "gpp3", 0x00),
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EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpp4", 0x04),
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EXYNOS850_PIN_BANK_EINTG(8, 0x040, "gpp5", 0x08),
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EXYNOS850_PIN_BANK_EINTG(8, 0x060, "gpg1", 0x0C),
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EXYNOS850_PIN_BANK_EINTG(8, 0x080, "gpg2", 0x10),
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EXYNOS850_PIN_BANK_EINTG(4, 0x0A0, "gpg3", 0x14),
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};
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static const struct samsung_pin_ctrl exynosautov9_pin_ctrl[] __initconst = {
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{
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/* pin-controller instance 0 ALIVE data */
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.pin_banks = exynosautov9_pin_banks0,
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.nr_banks = ARRAY_SIZE(exynosautov9_pin_banks0),
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.eint_wkup_init = exynos_eint_wkup_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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}, {
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/* pin-controller instance 1 AUD data */
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.pin_banks = exynosautov9_pin_banks1,
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.nr_banks = ARRAY_SIZE(exynosautov9_pin_banks1),
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}, {
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/* pin-controller instance 2 FSYS0 data */
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.pin_banks = exynosautov9_pin_banks2,
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.nr_banks = ARRAY_SIZE(exynosautov9_pin_banks2),
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.eint_gpio_init = exynos_eint_gpio_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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}, {
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/* pin-controller instance 3 FSYS1 data */
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.pin_banks = exynosautov9_pin_banks3,
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.nr_banks = ARRAY_SIZE(exynosautov9_pin_banks3),
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.eint_gpio_init = exynos_eint_gpio_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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}, {
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/* pin-controller instance 4 FSYS2 data */
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.pin_banks = exynosautov9_pin_banks4,
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.nr_banks = ARRAY_SIZE(exynosautov9_pin_banks4),
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.eint_gpio_init = exynos_eint_gpio_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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}, {
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/* pin-controller instance 5 PERIC0 data */
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.pin_banks = exynosautov9_pin_banks5,
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.nr_banks = ARRAY_SIZE(exynosautov9_pin_banks5),
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.eint_gpio_init = exynos_eint_gpio_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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}, {
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/* pin-controller instance 6 PERIC1 data */
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.pin_banks = exynosautov9_pin_banks6,
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.nr_banks = ARRAY_SIZE(exynosautov9_pin_banks6),
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.eint_gpio_init = exynos_eint_gpio_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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},
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};
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const struct samsung_pinctrl_of_match_data exynosautov9_of_data __initconst = {
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.ctrl = exynosautov9_pin_ctrl,
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.num_ctrl = ARRAY_SIZE(exynosautov9_pin_ctrl),
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};
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@ -1266,6 +1266,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = {
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.data = &exynos7_of_data },
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{ .compatible = "samsung,exynos850-pinctrl",
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.data = &exynos850_of_data },
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{ .compatible = "samsung,exynosautov9-pinctrl",
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.data = &exynosautov9_of_data },
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#endif
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#ifdef CONFIG_PINCTRL_S3C64XX
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{ .compatible = "samsung,s3c64xx-pinctrl",
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@ -340,6 +340,7 @@ extern const struct samsung_pinctrl_of_match_data exynos5420_of_data;
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extern const struct samsung_pinctrl_of_match_data exynos5433_of_data;
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extern const struct samsung_pinctrl_of_match_data exynos7_of_data;
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extern const struct samsung_pinctrl_of_match_data exynos850_of_data;
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extern const struct samsung_pinctrl_of_match_data exynosautov9_of_data;
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extern const struct samsung_pinctrl_of_match_data s3c64xx_of_data;
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extern const struct samsung_pinctrl_of_match_data s3c2412_of_data;
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extern const struct samsung_pinctrl_of_match_data s3c2416_of_data;
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