clk: mediatek: clk-mtk: Propagate struct device for composites

Like done for cpumux clocks, propagate struct device for composite
clocks registered through clk-mtk helpers to be able to get runtime
pm support for MTK clocks.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20230120092053.182923-6-angelogioacchino.delregno@collabora.com
Tested-by: Mingming Su <mingming.su@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
AngeloGioacchino Del Regno 2023-01-20 10:20:35 +01:00 committed by Stephen Boyd
parent f0b3140f4b
commit 01a6c1ab57
20 changed files with 93 additions and 58 deletions

View File

@ -683,8 +683,9 @@ static int mtk_topckgen_init(struct platform_device *pdev)
mtk_clk_register_factors(top_fixed_divs, ARRAY_SIZE(top_fixed_divs),
clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes),
base, &mt2701_clk_lock, clk_data);
mtk_clk_register_composites(&pdev->dev, top_muxes,
ARRAY_SIZE(top_muxes), base,
&mt2701_clk_lock, clk_data);
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
base, &mt2701_clk_lock, clk_data);
@ -921,8 +922,9 @@ static int mtk_pericfg_init(struct platform_device *pdev)
mtk_clk_register_gates(&pdev->dev, node, peri_clks,
ARRAY_SIZE(peri_clks), clk_data);
mtk_clk_register_composites(peri_muxs, ARRAY_SIZE(peri_muxs), base,
&mt2701_clk_lock, clk_data);
mtk_clk_register_composites(&pdev->dev, peri_muxs,
ARRAY_SIZE(peri_muxs), base,
&mt2701_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)

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@ -1346,8 +1346,9 @@ static int clk_mt2712_top_probe(struct platform_device *pdev)
mtk_clk_register_factors(top_early_divs, ARRAY_SIZE(top_early_divs),
top_clk_data);
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), top_clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base,
&mt2712_clk_lock, top_clk_data);
mtk_clk_register_composites(&pdev->dev, top_muxes,
ARRAY_SIZE(top_muxes), base,
&mt2712_clk_lock, top_clk_data);
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), base,
&mt2712_clk_lock, top_clk_data);
mtk_clk_register_gates(&pdev->dev, node, top_clks,
@ -1421,8 +1422,11 @@ static int clk_mt2712_mcu_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_MCU_NR_CLK);
mtk_clk_register_composites(mcu_muxes, ARRAY_SIZE(mcu_muxes), base,
&mt2712_clk_lock, clk_data);
r = mtk_clk_register_composites(&pdev->dev, mcu_muxes,
ARRAY_SIZE(mcu_muxes), base,
&mt2712_clk_lock, clk_data);
if (r)
dev_err(&pdev->dev, "Could not register composites: %d\n", r);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);

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@ -1247,11 +1247,13 @@ static int clk_mt6779_top_probe(struct platform_device *pdev)
mtk_clk_register_muxes(top_muxes, ARRAY_SIZE(top_muxes),
node, &mt6779_clk_lock, clk_data);
mtk_clk_register_composites(top_aud_muxes, ARRAY_SIZE(top_aud_muxes),
base, &mt6779_clk_lock, clk_data);
mtk_clk_register_composites(&pdev->dev, top_aud_muxes,
ARRAY_SIZE(top_aud_muxes), base,
&mt6779_clk_lock, clk_data);
mtk_clk_register_composites(top_aud_divs, ARRAY_SIZE(top_aud_divs),
base, &mt6779_clk_lock, clk_data);
mtk_clk_register_composites(&pdev->dev, top_aud_divs,
ARRAY_SIZE(top_aud_divs), base,
&mt6779_clk_lock, clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
}

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@ -114,7 +114,8 @@ static int clk_mt6795_pericfg_probe(struct platform_device *pdev)
if (ret)
goto free_clk_data;
ret = mtk_clk_register_composites(peri_clks, ARRAY_SIZE(peri_clks), base,
ret = mtk_clk_register_composites(&pdev->dev, peri_clks,
ARRAY_SIZE(peri_clks), base,
&mt6795_peri_clk_lock, clk_data);
if (ret)
goto unregister_gates;

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@ -557,7 +557,8 @@ static int clk_mt6795_topckgen_probe(struct platform_device *pdev)
if (ret)
goto unregister_factors;
ret = mtk_clk_register_composites(top_aud_divs, ARRAY_SIZE(top_aud_divs), base,
ret = mtk_clk_register_composites(&pdev->dev, top_aud_divs,
ARRAY_SIZE(top_aud_divs), base,
&mt6795_top_clk_lock, clk_data);
if (ret)
goto unregister_muxes;

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@ -396,7 +396,8 @@ static int mtk_topckgen_init(struct platform_device *pdev)
mtk_clk_register_factors(top_fixed_divs, ARRAY_SIZE(top_fixed_divs),
clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base,
mtk_clk_register_composites(&pdev->dev, top_muxes,
ARRAY_SIZE(top_muxes), base,
&mt6797_clk_lock, clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);

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@ -646,8 +646,9 @@ static int mtk_topckgen_init(struct platform_device *pdev)
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs),
clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes),
base, &mt7622_clk_lock, clk_data);
mtk_clk_register_composites(&pdev->dev, top_muxes,
ARRAY_SIZE(top_muxes), base,
&mt7622_clk_lock, clk_data);
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
base, &mt7622_clk_lock, clk_data);
@ -723,7 +724,8 @@ static int mtk_pericfg_init(struct platform_device *pdev)
mtk_clk_register_gates(&pdev->dev, node, peri_clks,
ARRAY_SIZE(peri_clks), clk_data);
mtk_clk_register_composites(peri_muxes, ARRAY_SIZE(peri_muxes), base,
mtk_clk_register_composites(&pdev->dev, peri_muxes,
ARRAY_SIZE(peri_muxes), base,
&mt7622_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);

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@ -588,8 +588,9 @@ static int mtk_topckgen_init(struct platform_device *pdev)
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs),
clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes),
base, &mt7629_clk_lock, clk_data);
mtk_clk_register_composites(&pdev->dev, top_muxes,
ARRAY_SIZE(top_muxes), base,
&mt7629_clk_lock, clk_data);
clk_prepare_enable(clk_data->hws[CLK_TOP_AXI_SEL]->clk);
clk_prepare_enable(clk_data->hws[CLK_TOP_MEM_SEL]->clk);
@ -631,7 +632,8 @@ static int mtk_pericfg_init(struct platform_device *pdev)
mtk_clk_register_gates(&pdev->dev, node, peri_clks,
ARRAY_SIZE(peri_clks), clk_data);
mtk_clk_register_composites(peri_muxes, ARRAY_SIZE(peri_muxes), base,
mtk_clk_register_composites(&pdev->dev, peri_muxes,
ARRAY_SIZE(peri_muxes), base,
&mt7629_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);

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@ -548,8 +548,9 @@ static void __init mtk_topckgen_init(struct device_node *node)
mtk_clk_register_factors(root_clk_alias, ARRAY_SIZE(root_clk_alias), clk_data);
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base,
&mt8135_clk_lock, clk_data);
mtk_clk_register_composites(NULL, top_muxes,
ARRAY_SIZE(top_muxes), base,
&mt8135_clk_lock, clk_data);
clk_prepare_enable(clk_data->hws[CLK_TOP_CCI_SEL]->clk);
@ -597,8 +598,9 @@ static void __init mtk_pericfg_init(struct device_node *node)
mtk_clk_register_gates(NULL, node, peri_gates,
ARRAY_SIZE(peri_gates), clk_data);
mtk_clk_register_composites(peri_clks, ARRAY_SIZE(peri_clks), base,
&mt8135_clk_lock, clk_data);
mtk_clk_register_composites(NULL, peri_clks,
ARRAY_SIZE(peri_clks), base,
&mt8135_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)

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@ -940,8 +940,9 @@ static void __init mtk_topckgen_init(struct device_node *node)
mtk_clk_register_gates(NULL, node, top_clks, ARRAY_SIZE(top_clks), clk_data);
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base,
&mt8167_clk_lock, clk_data);
mtk_clk_register_composites(NULL, top_muxes,
ARRAY_SIZE(top_muxes), base,
&mt8167_clk_lock, clk_data);
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
base, &mt8167_clk_lock, clk_data);
@ -966,8 +967,9 @@ static void __init mtk_infracfg_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(CLK_IFR_NR_CLK);
mtk_clk_register_composites(ifr_muxes, ARRAY_SIZE(ifr_muxes), base,
&mt8167_clk_lock, clk_data);
mtk_clk_register_composites(NULL, ifr_muxes,
ARRAY_SIZE(ifr_muxes), base,
&mt8167_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)

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@ -869,8 +869,9 @@ static void __init mtk_topckgen_init(struct device_node *node)
mtk_clk_register_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks), clk_data);
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base,
&mt8173_clk_lock, clk_data);
mtk_clk_register_composites(NULL, top_muxes,
ARRAY_SIZE(top_muxes), base,
&mt8173_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)
@ -920,8 +921,9 @@ static void __init mtk_pericfg_init(struct device_node *node)
mtk_clk_register_gates(NULL, node, peri_gates,
ARRAY_SIZE(peri_gates), clk_data);
mtk_clk_register_composites(peri_clks, ARRAY_SIZE(peri_clks), base,
&mt8173_clk_lock, clk_data);
mtk_clk_register_composites(NULL, peri_clks,
ARRAY_SIZE(peri_clks), base,
&mt8173_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)

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@ -1169,11 +1169,13 @@ static int clk_mt8183_top_probe(struct platform_device *pdev)
mtk_clk_register_muxes(top_muxes, ARRAY_SIZE(top_muxes),
node, &mt8183_clk_lock, top_clk_data);
mtk_clk_register_composites(top_aud_muxes, ARRAY_SIZE(top_aud_muxes),
base, &mt8183_clk_lock, top_clk_data);
mtk_clk_register_composites(&pdev->dev, top_aud_muxes,
ARRAY_SIZE(top_aud_muxes), base,
&mt8183_clk_lock, top_clk_data);
mtk_clk_register_composites(top_aud_divs, ARRAY_SIZE(top_aud_divs),
base, &mt8183_clk_lock, top_clk_data);
mtk_clk_register_composites(&pdev->dev, top_aud_divs,
ARRAY_SIZE(top_aud_divs), base,
&mt8183_clk_lock, top_clk_data);
mtk_clk_register_gates(&pdev->dev, node, top_clks,
ARRAY_SIZE(top_clks), top_clk_data);
@ -1236,8 +1238,9 @@ static int clk_mt8183_mcu_probe(struct platform_device *pdev)
clk_data = mtk_alloc_clk_data(CLK_MCU_NR_CLK);
mtk_clk_register_composites(mcu_muxes, ARRAY_SIZE(mcu_muxes), base,
&mt8183_clk_lock, clk_data);
mtk_clk_register_composites(&pdev->dev, mcu_muxes,
ARRAY_SIZE(mcu_muxes), base,
&mt8183_clk_lock, clk_data);
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
}

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@ -65,7 +65,8 @@ static int clk_mt8186_mcu_probe(struct platform_device *pdev)
goto free_mcu_data;
}
r = mtk_clk_register_composites(mcu_muxes, ARRAY_SIZE(mcu_muxes), base,
r = mtk_clk_register_composites(&pdev->dev, mcu_muxes,
ARRAY_SIZE(mcu_muxes), base,
NULL, clk_data);
if (r)
goto free_mcu_data;

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@ -742,12 +742,14 @@ static int clk_mt8186_topck_probe(struct platform_device *pdev)
if (r)
goto unregister_factors;
r = mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base,
r = mtk_clk_register_composites(&pdev->dev, top_muxes,
ARRAY_SIZE(top_muxes), base,
&mt8186_clk_lock, clk_data);
if (r)
goto unregister_muxes;
r = mtk_clk_register_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), base,
r = mtk_clk_register_composites(&pdev->dev, top_adj_divs,
ARRAY_SIZE(top_adj_divs), base,
&mt8186_clk_lock, clk_data);
if (r)
goto unregister_composite_muxes;

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@ -1117,12 +1117,14 @@ static int clk_mt8192_top_probe(struct platform_device *pdev)
if (r)
goto unregister_factors;
r = mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base,
r = mtk_clk_register_composites(&pdev->dev, top_muxes,
ARRAY_SIZE(top_muxes), base,
&mt8192_clk_lock, top_clk_data);
if (r)
goto unregister_muxes;
r = mtk_clk_register_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), base,
r = mtk_clk_register_composites(&pdev->dev, top_adj_divs,
ARRAY_SIZE(top_adj_divs), base,
&mt8192_clk_lock, top_clk_data);
if (r)
goto unregister_top_composites;

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@ -1281,7 +1281,8 @@ static int clk_mt8195_topck_probe(struct platform_device *pdev)
if (r)
goto unregister_muxes;
r = mtk_clk_register_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), base,
r = mtk_clk_register_composites(&pdev->dev, top_adj_divs,
ARRAY_SIZE(top_adj_divs), base,
&mt8195_clk_lock, top_clk_data);
if (r)
goto unregister_muxes;

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@ -952,7 +952,7 @@ static int clk_mt8365_top_probe(struct platform_device *pdev)
if (ret)
goto unregister_factors;
ret = mtk_clk_register_composites(top_misc_mux_gates,
ret = mtk_clk_register_composites(&pdev->dev, top_misc_mux_gates,
ARRAY_SIZE(top_misc_mux_gates), base,
&mt8365_clk_lock, clk_data);
if (ret)
@ -1080,8 +1080,9 @@ static int clk_mt8365_mcu_probe(struct platform_device *pdev)
if (!clk_data)
return -ENOMEM;
ret = mtk_clk_register_composites(mcu_muxes, ARRAY_SIZE(mcu_muxes),
base, &mt8365_clk_lock, clk_data);
ret = mtk_clk_register_composites(&pdev->dev, mcu_muxes,
ARRAY_SIZE(mcu_muxes), base,
&mt8365_clk_lock, clk_data);
if (ret)
goto free_clk_data;

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@ -694,8 +694,9 @@ static void __init mtk_topckgen_init(struct device_node *node)
mtk_clk_register_gates(NULL, node, top_clks, ARRAY_SIZE(top_clks), clk_data);
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base,
&mt8516_clk_lock, clk_data);
mtk_clk_register_composites(NULL, top_muxes,
ARRAY_SIZE(top_muxes), base,
&mt8516_clk_lock, clk_data);
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
base, &mt8516_clk_lock, clk_data);
@ -720,8 +721,9 @@ static void __init mtk_infracfg_init(struct device_node *node)
clk_data = mtk_alloc_clk_data(CLK_IFR_NR_CLK);
mtk_clk_register_composites(ifr_muxes, ARRAY_SIZE(ifr_muxes), base,
&mt8516_clk_lock, clk_data);
mtk_clk_register_composites(NULL, ifr_muxes,
ARRAY_SIZE(ifr_muxes), base,
&mt8516_clk_lock, clk_data);
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)

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@ -197,8 +197,8 @@ void mtk_clk_unregister_factors(const struct mtk_fixed_factor *clks, int num,
}
EXPORT_SYMBOL_GPL(mtk_clk_unregister_factors);
static struct clk_hw *mtk_clk_register_composite(const struct mtk_composite *mc,
void __iomem *base, spinlock_t *lock)
static struct clk_hw *mtk_clk_register_composite(struct device *dev,
const struct mtk_composite *mc, void __iomem *base, spinlock_t *lock)
{
struct clk_hw *hw;
struct clk_mux *mux = NULL;
@ -264,7 +264,7 @@ static struct clk_hw *mtk_clk_register_composite(const struct mtk_composite *mc,
div_ops = &clk_divider_ops;
}
hw = clk_hw_register_composite(NULL, mc->name, parent_names, num_parents,
hw = clk_hw_register_composite(dev, mc->name, parent_names, num_parents,
mux_hw, mux_ops,
div_hw, div_ops,
gate_hw, gate_ops,
@ -308,7 +308,8 @@ static void mtk_clk_unregister_composite(struct clk_hw *hw)
kfree(mux);
}
int mtk_clk_register_composites(const struct mtk_composite *mcs, int num,
int mtk_clk_register_composites(struct device *dev,
const struct mtk_composite *mcs, int num,
void __iomem *base, spinlock_t *lock,
struct clk_hw_onecell_data *clk_data)
{
@ -327,7 +328,7 @@ int mtk_clk_register_composites(const struct mtk_composite *mcs, int num,
continue;
}
hw = mtk_clk_register_composite(mc, base, lock);
hw = mtk_clk_register_composite(dev, mc, base, lock);
if (IS_ERR(hw)) {
pr_err("Failed to register clk %s: %pe\n", mc->name,

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@ -154,7 +154,8 @@ struct mtk_composite {
.flags = 0, \
}
int mtk_clk_register_composites(const struct mtk_composite *mcs, int num,
int mtk_clk_register_composites(struct device *dev,
const struct mtk_composite *mcs, int num,
void __iomem *base, spinlock_t *lock,
struct clk_hw_onecell_data *clk_data);
void mtk_clk_unregister_composites(const struct mtk_composite *mcs, int num,