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pcnet32: delete non NAPI code from driver.
Delete the non-napi code from the driver and Kconfig. Tested x86_64. Apply at next open opportunity. Signed-off-by: Don Fry <pcnet32@verizon.net> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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a86e2cbe26
commit
01935d7d2c
@ -1273,20 +1273,6 @@ config PCNET32
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To compile this driver as a module, choose M here. The module
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To compile this driver as a module, choose M here. The module
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will be called pcnet32.
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will be called pcnet32.
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config PCNET32_NAPI
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bool "Use RX polling (NAPI)"
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depends on PCNET32
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help
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NAPI is a new driver API designed to reduce CPU and interrupt load
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when the driver is receiving lots of packets from the card. It is
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still somewhat experimental and thus not yet enabled by default.
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If your estimated Rx load is 10kpps or more, or if the card will be
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deployed on potentially unfriendly networks (e.g. in a firewall),
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then say Y here.
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If in doubt, say N.
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config AMD8111_ETH
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config AMD8111_ETH
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tristate "AMD 8111 (new PCI lance) support"
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tristate "AMD 8111 (new PCI lance) support"
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depends on NET_PCI && PCI
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depends on NET_PCI && PCI
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@ -22,12 +22,8 @@
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*************************************************************************/
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*************************************************************************/
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#define DRV_NAME "pcnet32"
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#define DRV_NAME "pcnet32"
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#ifdef CONFIG_PCNET32_NAPI
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#define DRV_VERSION "1.35"
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#define DRV_VERSION "1.34-NAPI"
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#define DRV_RELDATE "21.Apr.2008"
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#else
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#define DRV_VERSION "1.34"
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#endif
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#define DRV_RELDATE "14.Aug.2007"
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#define PFX DRV_NAME ": "
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#define PFX DRV_NAME ": "
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static const char *const version =
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static const char *const version =
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@ -445,30 +441,24 @@ static struct pcnet32_access pcnet32_dwio = {
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static void pcnet32_netif_stop(struct net_device *dev)
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static void pcnet32_netif_stop(struct net_device *dev)
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{
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{
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#ifdef CONFIG_PCNET32_NAPI
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struct pcnet32_private *lp = netdev_priv(dev);
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struct pcnet32_private *lp = netdev_priv(dev);
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#endif
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dev->trans_start = jiffies;
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dev->trans_start = jiffies;
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#ifdef CONFIG_PCNET32_NAPI
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napi_disable(&lp->napi);
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napi_disable(&lp->napi);
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#endif
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netif_tx_disable(dev);
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netif_tx_disable(dev);
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}
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}
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static void pcnet32_netif_start(struct net_device *dev)
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static void pcnet32_netif_start(struct net_device *dev)
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{
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{
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#ifdef CONFIG_PCNET32_NAPI
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struct pcnet32_private *lp = netdev_priv(dev);
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struct pcnet32_private *lp = netdev_priv(dev);
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ulong ioaddr = dev->base_addr;
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ulong ioaddr = dev->base_addr;
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u16 val;
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u16 val;
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#endif
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netif_wake_queue(dev);
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netif_wake_queue(dev);
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#ifdef CONFIG_PCNET32_NAPI
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val = lp->a.read_csr(ioaddr, CSR3);
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val = lp->a.read_csr(ioaddr, CSR3);
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val &= 0x00ff;
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val &= 0x00ff;
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lp->a.write_csr(ioaddr, CSR3, val);
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lp->a.write_csr(ioaddr, CSR3, val);
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napi_enable(&lp->napi);
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napi_enable(&lp->napi);
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#endif
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}
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}
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/*
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/*
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@ -911,11 +901,7 @@ static int pcnet32_loopback_test(struct net_device *dev, uint64_t * data1)
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rc = 1; /* default to fail */
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rc = 1; /* default to fail */
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if (netif_running(dev))
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if (netif_running(dev))
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#ifdef CONFIG_PCNET32_NAPI
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pcnet32_netif_stop(dev);
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pcnet32_netif_stop(dev);
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#else
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pcnet32_close(dev);
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#endif
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spin_lock_irqsave(&lp->lock, flags);
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spin_lock_irqsave(&lp->lock, flags);
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lp->a.write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */
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lp->a.write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */
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@ -1046,7 +1032,6 @@ static int pcnet32_loopback_test(struct net_device *dev, uint64_t * data1)
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x = a->read_bcr(ioaddr, 32); /* reset internal loopback */
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x = a->read_bcr(ioaddr, 32); /* reset internal loopback */
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a->write_bcr(ioaddr, 32, (x & ~0x0002));
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a->write_bcr(ioaddr, 32, (x & ~0x0002));
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#ifdef CONFIG_PCNET32_NAPI
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if (netif_running(dev)) {
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if (netif_running(dev)) {
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pcnet32_netif_start(dev);
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pcnet32_netif_start(dev);
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pcnet32_restart(dev, CSR0_NORMAL);
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pcnet32_restart(dev, CSR0_NORMAL);
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@ -1055,16 +1040,6 @@ static int pcnet32_loopback_test(struct net_device *dev, uint64_t * data1)
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lp->a.write_bcr(ioaddr, 20, 4); /* return to 16bit mode */
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lp->a.write_bcr(ioaddr, 20, 4); /* return to 16bit mode */
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}
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}
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spin_unlock_irqrestore(&lp->lock, flags);
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spin_unlock_irqrestore(&lp->lock, flags);
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#else
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if (netif_running(dev)) {
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spin_unlock_irqrestore(&lp->lock, flags);
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pcnet32_open(dev);
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} else {
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pcnet32_purge_rx_ring(dev);
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lp->a.write_bcr(ioaddr, 20, 4); /* return to 16bit mode */
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spin_unlock_irqrestore(&lp->lock, flags);
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}
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#endif
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return (rc);
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return (rc);
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} /* end pcnet32_loopback_test */
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} /* end pcnet32_loopback_test */
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@ -1270,11 +1245,7 @@ static void pcnet32_rx_entry(struct net_device *dev,
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}
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}
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dev->stats.rx_bytes += skb->len;
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dev->stats.rx_bytes += skb->len;
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skb->protocol = eth_type_trans(skb, dev);
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skb->protocol = eth_type_trans(skb, dev);
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#ifdef CONFIG_PCNET32_NAPI
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netif_receive_skb(skb);
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netif_receive_skb(skb);
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#else
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netif_rx(skb);
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#endif
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dev->last_rx = jiffies;
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dev->last_rx = jiffies;
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dev->stats.rx_packets++;
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dev->stats.rx_packets++;
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return;
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return;
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@ -1403,7 +1374,6 @@ static int pcnet32_tx(struct net_device *dev)
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return must_restart;
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return must_restart;
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}
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}
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#ifdef CONFIG_PCNET32_NAPI
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static int pcnet32_poll(struct napi_struct *napi, int budget)
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static int pcnet32_poll(struct napi_struct *napi, int budget)
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{
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{
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struct pcnet32_private *lp = container_of(napi, struct pcnet32_private, napi);
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struct pcnet32_private *lp = container_of(napi, struct pcnet32_private, napi);
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@ -1442,7 +1412,6 @@ static int pcnet32_poll(struct napi_struct *napi, int budget)
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}
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}
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return work_done;
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return work_done;
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}
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}
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#endif
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#define PCNET32_REGS_PER_PHY 32
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#define PCNET32_REGS_PER_PHY 32
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#define PCNET32_MAX_PHYS 32
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#define PCNET32_MAX_PHYS 32
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@ -1864,9 +1833,7 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)
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/* napi.weight is used in both the napi and non-napi cases */
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/* napi.weight is used in both the napi and non-napi cases */
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lp->napi.weight = lp->rx_ring_size / 2;
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lp->napi.weight = lp->rx_ring_size / 2;
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#ifdef CONFIG_PCNET32_NAPI
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netif_napi_add(dev, &lp->napi, pcnet32_poll, lp->rx_ring_size / 2);
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netif_napi_add(dev, &lp->napi, pcnet32_poll, lp->rx_ring_size / 2);
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#endif
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if (fdx && !(lp->options & PCNET32_PORT_ASEL) &&
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if (fdx && !(lp->options & PCNET32_PORT_ASEL) &&
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((cards_found >= MAX_UNITS) || full_duplex[cards_found]))
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((cards_found >= MAX_UNITS) || full_duplex[cards_found]))
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@ -2297,9 +2264,7 @@ static int pcnet32_open(struct net_device *dev)
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goto err_free_ring;
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goto err_free_ring;
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}
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}
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#ifdef CONFIG_PCNET32_NAPI
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napi_enable(&lp->napi);
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napi_enable(&lp->napi);
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#endif
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/* Re-initialize the PCNET32, and start it when done. */
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/* Re-initialize the PCNET32, and start it when done. */
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lp->a.write_csr(ioaddr, 1, (lp->init_dma_addr & 0xffff));
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lp->a.write_csr(ioaddr, 1, (lp->init_dma_addr & 0xffff));
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@ -2623,7 +2588,6 @@ pcnet32_interrupt(int irq, void *dev_id)
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dev->name, csr0);
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dev->name, csr0);
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/* unlike for the lance, there is no restart needed */
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/* unlike for the lance, there is no restart needed */
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}
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}
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#ifdef CONFIG_PCNET32_NAPI
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if (netif_rx_schedule_prep(dev, &lp->napi)) {
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if (netif_rx_schedule_prep(dev, &lp->napi)) {
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u16 val;
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u16 val;
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/* set interrupt masks */
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/* set interrupt masks */
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@ -2634,24 +2598,9 @@ pcnet32_interrupt(int irq, void *dev_id)
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__netif_rx_schedule(dev, &lp->napi);
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__netif_rx_schedule(dev, &lp->napi);
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break;
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break;
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}
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}
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#else
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pcnet32_rx(dev, lp->napi.weight);
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if (pcnet32_tx(dev)) {
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/* reset the chip to clear the error condition, then restart */
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lp->a.reset(ioaddr);
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lp->a.write_csr(ioaddr, CSR4, 0x0915); /* auto tx pad */
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pcnet32_restart(dev, CSR0_START);
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netif_wake_queue(dev);
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}
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#endif
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csr0 = lp->a.read_csr(ioaddr, CSR0);
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csr0 = lp->a.read_csr(ioaddr, CSR0);
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}
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}
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#ifndef CONFIG_PCNET32_NAPI
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/* Set interrupt enable. */
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lp->a.write_csr(ioaddr, CSR0, CSR0_INTEN);
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#endif
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if (netif_msg_intr(lp))
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if (netif_msg_intr(lp))
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printk(KERN_DEBUG "%s: exiting interrupt, csr0=%#4.4x.\n",
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printk(KERN_DEBUG "%s: exiting interrupt, csr0=%#4.4x.\n",
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dev->name, lp->a.read_csr(ioaddr, CSR0));
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dev->name, lp->a.read_csr(ioaddr, CSR0));
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@ -2670,9 +2619,7 @@ static int pcnet32_close(struct net_device *dev)
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del_timer_sync(&lp->watchdog_timer);
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del_timer_sync(&lp->watchdog_timer);
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netif_stop_queue(dev);
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netif_stop_queue(dev);
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#ifdef CONFIG_PCNET32_NAPI
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napi_disable(&lp->napi);
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napi_disable(&lp->napi);
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#endif
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spin_lock_irqsave(&lp->lock, flags);
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spin_lock_irqsave(&lp->lock, flags);
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