drm/amdgpu/gfx11: per queue reset only on bare metal

It's not supported under SR-IOV at the moment.

Acked-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2024-07-18 10:21:45 -04:00
parent 4d5ddfa4b1
commit 01163079e1

View File

@ -6549,6 +6549,9 @@ static int gfx_v11_0_reset_kgq(struct amdgpu_ring *ring, unsigned int vmid)
struct amdgpu_device *adev = ring->adev;
int r;
if (amdgpu_sriov_vf(adev))
return -EINVAL;
r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, false);
if (r)
return r;
@ -6584,6 +6587,9 @@ static int gfx_v11_0_reset_kcq(struct amdgpu_ring *ring, unsigned int vmid)
struct amdgpu_device *adev = ring->adev;
int i, r = 0;
if (amdgpu_sriov_vf(adev))
return -EINVAL;
gfx_v11_0_set_safe_mode(adev, 0);
mutex_lock(&adev->srbm_mutex);
soc21_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);