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drm/amdgpu/gfx11: per queue reset only on bare metal
It's not supported under SR-IOV at the moment. Acked-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -6549,6 +6549,9 @@ static int gfx_v11_0_reset_kgq(struct amdgpu_ring *ring, unsigned int vmid)
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struct amdgpu_device *adev = ring->adev;
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int r;
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if (amdgpu_sriov_vf(adev))
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return -EINVAL;
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r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, false);
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if (r)
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return r;
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@ -6584,6 +6587,9 @@ static int gfx_v11_0_reset_kcq(struct amdgpu_ring *ring, unsigned int vmid)
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struct amdgpu_device *adev = ring->adev;
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int i, r = 0;
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if (amdgpu_sriov_vf(adev))
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return -EINVAL;
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gfx_v11_0_set_safe_mode(adev, 0);
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mutex_lock(&adev->srbm_mutex);
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soc21_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
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