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MPC52xx PSC SPI master driver
SPI master driver for MPC52xx using its Programmable Serial Controller. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Dragos Carp <dragos.carp@toptica.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Dragos Carp
Linus Torvalds
parent
0ea9718016
commit
00b8fd2367
@ -107,6 +107,13 @@ config SPI_IMX
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This enables using the Freescale iMX SPI controller in master
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mode.
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config SPI_MPC52xx_PSC
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tristate "Freescale MPC52xx PSC SPI controller"
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depends on SPI_MASTER && PPC_MPC52xx && EXPERIMENTAL
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help
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This enables using the Freescale MPC52xx Programmable Serial
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Controller in master SPI mode.
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config SPI_MPC83xx
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tristate "Freescale MPC83xx SPI controller"
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depends on SPI_MASTER && PPC_83xx && EXPERIMENTAL
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@ -19,6 +19,7 @@ obj-$(CONFIG_SPI_BUTTERFLY) += spi_butterfly.o
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obj-$(CONFIG_SPI_IMX) += spi_imx.o
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obj-$(CONFIG_SPI_PXA2XX) += pxa2xx_spi.o
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obj-$(CONFIG_SPI_OMAP_UWIRE) += omap_uwire.o
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obj-$(CONFIG_SPI_MPC52xx_PSC) += mpc52xx_psc_spi.o
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obj-$(CONFIG_SPI_MPC83xx) += spi_mpc83xx.o
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obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o
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obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx.o
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654
drivers/spi/mpc52xx_psc_spi.c
Normal file
654
drivers/spi/mpc52xx_psc_spi.c
Normal file
@ -0,0 +1,654 @@
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/*
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* MPC52xx SPC in SPI mode driver.
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*
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* Maintainer: Dragos Carp
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*
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* Copyright (C) 2006 TOPTICA Photonics AG.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/interrupt.h>
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#if defined(CONFIG_PPC_MERGE)
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#include <asm/of_platform.h>
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#else
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#include <linux/platform_device.h>
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#endif
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#include <linux/workqueue.h>
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#include <linux/completion.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/spi/spi.h>
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#include <linux/fsl_devices.h>
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#include <asm/mpc52xx.h>
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#include <asm/mpc52xx_psc.h>
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#define MCLK 20000000 /* PSC port MClk in hz */
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struct mpc52xx_psc_spi {
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/* fsl_spi_platform data */
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void (*activate_cs)(u8, u8);
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void (*deactivate_cs)(u8, u8);
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u32 sysclk;
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/* driver internal data */
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struct mpc52xx_psc __iomem *psc;
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unsigned int irq;
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u8 bits_per_word;
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u8 busy;
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struct workqueue_struct *workqueue;
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struct work_struct work;
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struct list_head queue;
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spinlock_t lock;
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struct completion done;
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};
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/* controller state */
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struct mpc52xx_psc_spi_cs {
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int bits_per_word;
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int speed_hz;
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};
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/* set clock freq, clock ramp, bits per work
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* if t is NULL then reset the values to the default values
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*/
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static int mpc52xx_psc_spi_transfer_setup(struct spi_device *spi,
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struct spi_transfer *t)
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{
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struct mpc52xx_psc_spi_cs *cs = spi->controller_state;
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cs->speed_hz = (t && t->speed_hz)
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? t->speed_hz : spi->max_speed_hz;
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cs->bits_per_word = (t && t->bits_per_word)
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? t->bits_per_word : spi->bits_per_word;
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cs->bits_per_word = ((cs->bits_per_word + 7) / 8) * 8;
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return 0;
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}
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static void mpc52xx_psc_spi_activate_cs(struct spi_device *spi)
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{
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struct mpc52xx_psc_spi_cs *cs = spi->controller_state;
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struct mpc52xx_psc_spi *mps = spi_master_get_devdata(spi->master);
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struct mpc52xx_psc __iomem *psc = mps->psc;
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u32 sicr;
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u16 ccr;
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sicr = in_be32(&psc->sicr);
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/* Set clock phase and polarity */
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if (spi->mode & SPI_CPHA)
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sicr |= 0x00001000;
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else
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sicr &= ~0x00001000;
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if (spi->mode & SPI_CPOL)
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sicr |= 0x00002000;
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else
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sicr &= ~0x00002000;
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if (spi->mode & SPI_LSB_FIRST)
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sicr |= 0x10000000;
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else
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sicr &= ~0x10000000;
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out_be32(&psc->sicr, sicr);
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/* Set clock frequency and bits per word
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* Because psc->ccr is defined as 16bit register instead of 32bit
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* just set the lower byte of BitClkDiv
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*/
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ccr = in_be16(&psc->ccr);
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ccr &= 0xFF00;
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if (cs->speed_hz)
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ccr |= (MCLK / cs->speed_hz - 1) & 0xFF;
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else /* by default SPI Clk 1MHz */
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ccr |= (MCLK / 1000000 - 1) & 0xFF;
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out_be16(&psc->ccr, ccr);
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mps->bits_per_word = cs->bits_per_word;
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if (mps->activate_cs)
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mps->activate_cs(spi->chip_select,
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(spi->mode & SPI_CS_HIGH) ? 1 : 0);
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}
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static void mpc52xx_psc_spi_deactivate_cs(struct spi_device *spi)
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{
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struct mpc52xx_psc_spi *mps = spi_master_get_devdata(spi->master);
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if (mps->deactivate_cs)
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mps->deactivate_cs(spi->chip_select,
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(spi->mode & SPI_CS_HIGH) ? 1 : 0);
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}
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#define MPC52xx_PSC_BUFSIZE (MPC52xx_PSC_RFNUM_MASK + 1)
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/* wake up when 80% fifo full */
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#define MPC52xx_PSC_RFALARM (MPC52xx_PSC_BUFSIZE * 20 / 100)
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static int mpc52xx_psc_spi_transfer_rxtx(struct spi_device *spi,
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struct spi_transfer *t)
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{
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struct mpc52xx_psc_spi *mps = spi_master_get_devdata(spi->master);
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struct mpc52xx_psc __iomem *psc = mps->psc;
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unsigned rb = 0; /* number of bytes receieved */
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unsigned sb = 0; /* number of bytes sent */
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unsigned char *rx_buf = (unsigned char *)t->rx_buf;
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unsigned char *tx_buf = (unsigned char *)t->tx_buf;
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unsigned rfalarm;
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unsigned send_at_once = MPC52xx_PSC_BUFSIZE;
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unsigned recv_at_once;
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unsigned bpw = mps->bits_per_word / 8;
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if (!t->tx_buf && !t->rx_buf && t->len)
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return -EINVAL;
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/* enable transmiter/receiver */
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out_8(&psc->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
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while (rb < t->len) {
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if (t->len - rb > MPC52xx_PSC_BUFSIZE) {
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rfalarm = MPC52xx_PSC_RFALARM;
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} else {
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send_at_once = t->len - sb;
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rfalarm = MPC52xx_PSC_BUFSIZE - (t->len - rb);
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}
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dev_dbg(&spi->dev, "send %d bytes...\n", send_at_once);
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if (tx_buf) {
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for (; send_at_once; sb++, send_at_once--) {
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/* set EOF flag */
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if (mps->bits_per_word
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&& (sb + 1) % bpw == 0)
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out_8(&psc->ircr2, 0x01);
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out_8(&psc->mpc52xx_psc_buffer_8, tx_buf[sb]);
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}
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} else {
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for (; send_at_once; sb++, send_at_once--) {
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/* set EOF flag */
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if (mps->bits_per_word
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&& ((sb + 1) % bpw) == 0)
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out_8(&psc->ircr2, 0x01);
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out_8(&psc->mpc52xx_psc_buffer_8, 0);
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}
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}
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/* enable interupts and wait for wake up
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* if just one byte is expected the Rx FIFO genererates no
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* FFULL interrupt, so activate the RxRDY interrupt
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*/
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out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
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if (t->len - rb == 1) {
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out_8(&psc->mode, 0);
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} else {
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out_8(&psc->mode, MPC52xx_PSC_MODE_FFULL);
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out_be16(&psc->rfalarm, rfalarm);
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}
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out_be16(&psc->mpc52xx_psc_imr, MPC52xx_PSC_IMR_RXRDY);
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wait_for_completion(&mps->done);
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recv_at_once = in_be16(&psc->rfnum);
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dev_dbg(&spi->dev, "%d bytes received\n", recv_at_once);
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send_at_once = recv_at_once;
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if (rx_buf) {
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for (; recv_at_once; rb++, recv_at_once--)
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rx_buf[rb] = in_8(&psc->mpc52xx_psc_buffer_8);
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} else {
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for (; recv_at_once; rb++, recv_at_once--)
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in_8(&psc->mpc52xx_psc_buffer_8);
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}
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}
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/* disable transmiter/receiver */
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out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
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return 0;
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}
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static void mpc52xx_psc_spi_work(struct work_struct *work)
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{
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struct mpc52xx_psc_spi *mps =
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container_of(work, struct mpc52xx_psc_spi, work);
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spin_lock_irq(&mps->lock);
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mps->busy = 1;
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while (!list_empty(&mps->queue)) {
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struct spi_message *m;
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struct spi_device *spi;
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struct spi_transfer *t = NULL;
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unsigned cs_change;
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int status;
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m = container_of(mps->queue.next, struct spi_message, queue);
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list_del_init(&m->queue);
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spin_unlock_irq(&mps->lock);
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spi = m->spi;
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cs_change = 1;
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status = 0;
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list_for_each_entry (t, &m->transfers, transfer_list) {
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if (t->bits_per_word || t->speed_hz) {
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status = mpc52xx_psc_spi_transfer_setup(spi, t);
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if (status < 0)
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break;
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}
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if (cs_change)
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mpc52xx_psc_spi_activate_cs(spi);
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cs_change = t->cs_change;
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status = mpc52xx_psc_spi_transfer_rxtx(spi, t);
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if (status)
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break;
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m->actual_length += t->len;
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if (t->delay_usecs)
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udelay(t->delay_usecs);
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if (cs_change)
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mpc52xx_psc_spi_deactivate_cs(spi);
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}
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m->status = status;
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m->complete(m->context);
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if (status || !cs_change)
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mpc52xx_psc_spi_deactivate_cs(spi);
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mpc52xx_psc_spi_transfer_setup(spi, NULL);
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spin_lock_irq(&mps->lock);
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}
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mps->busy = 0;
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spin_unlock_irq(&mps->lock);
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}
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static int mpc52xx_psc_spi_setup(struct spi_device *spi)
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{
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struct mpc52xx_psc_spi *mps = spi_master_get_devdata(spi->master);
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struct mpc52xx_psc_spi_cs *cs = spi->controller_state;
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unsigned long flags;
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if (spi->bits_per_word%8)
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return -EINVAL;
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if (!cs) {
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cs = kzalloc(sizeof *cs, GFP_KERNEL);
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if (!cs)
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return -ENOMEM;
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spi->controller_state = cs;
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}
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cs->bits_per_word = spi->bits_per_word;
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cs->speed_hz = spi->max_speed_hz;
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spin_lock_irqsave(&mps->lock, flags);
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if (!mps->busy)
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mpc52xx_psc_spi_deactivate_cs(spi);
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spin_unlock_irqrestore(&mps->lock, flags);
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return 0;
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}
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static int mpc52xx_psc_spi_transfer(struct spi_device *spi,
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struct spi_message *m)
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{
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struct mpc52xx_psc_spi *mps = spi_master_get_devdata(spi->master);
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unsigned long flags;
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m->actual_length = 0;
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m->status = -EINPROGRESS;
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spin_lock_irqsave(&mps->lock, flags);
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list_add_tail(&m->queue, &mps->queue);
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queue_work(mps->workqueue, &mps->work);
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spin_unlock_irqrestore(&mps->lock, flags);
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return 0;
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}
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static void mpc52xx_psc_spi_cleanup(struct spi_device *spi)
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{
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kfree(spi->controller_state);
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}
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static int mpc52xx_psc_spi_port_config(int psc_id, struct mpc52xx_psc_spi *mps)
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{
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struct mpc52xx_cdm __iomem *cdm;
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struct mpc52xx_gpio __iomem *gpio;
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struct mpc52xx_psc __iomem *psc = mps->psc;
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u32 ul;
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u32 mclken_div;
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int ret = 0;
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#if defined(CONFIG_PPC_MERGE)
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cdm = mpc52xx_find_and_map("mpc52xx-cdm");
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gpio = mpc52xx_find_and_map("mpc52xx-gpio");
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#else
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cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
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gpio = ioremap(MPC52xx_PA(MPC52xx_GPIO_OFFSET), MPC52xx_GPIO_SIZE);
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#endif
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if (!cdm || !gpio) {
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printk(KERN_ERR "Error mapping CDM/GPIO\n");
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ret = -EFAULT;
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goto unmap_regs;
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}
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/* default sysclk is 512MHz */
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mclken_div = 0x8000 |
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(((mps->sysclk ? mps->sysclk : 512000000) / MCLK) & 0x1FF);
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switch (psc_id) {
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case 1:
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ul = in_be32(&gpio->port_config);
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ul &= 0xFFFFFFF8;
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ul |= 0x00000006;
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out_be32(&gpio->port_config, ul);
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out_be16(&cdm->mclken_div_psc1, mclken_div);
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ul = in_be32(&cdm->clk_enables);
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ul |= 0x00000020;
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out_be32(&cdm->clk_enables, ul);
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break;
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case 2:
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ul = in_be32(&gpio->port_config);
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ul &= 0xFFFFFF8F;
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ul |= 0x00000060;
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out_be32(&gpio->port_config, ul);
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out_be16(&cdm->mclken_div_psc2, mclken_div);
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ul = in_be32(&cdm->clk_enables);
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ul |= 0x00000040;
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out_be32(&cdm->clk_enables, ul);
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break;
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case 3:
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ul = in_be32(&gpio->port_config);
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ul &= 0xFFFFF0FF;
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ul |= 0x00000600;
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out_be32(&gpio->port_config, ul);
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out_be16(&cdm->mclken_div_psc3, mclken_div);
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ul = in_be32(&cdm->clk_enables);
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ul |= 0x00000080;
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out_be32(&cdm->clk_enables, ul);
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break;
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case 6:
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ul = in_be32(&gpio->port_config);
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ul &= 0xFF8FFFFF;
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ul |= 0x00700000;
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out_be32(&gpio->port_config, ul);
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out_be16(&cdm->mclken_div_psc6, mclken_div);
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ul = in_be32(&cdm->clk_enables);
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ul |= 0x00000010;
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out_be32(&cdm->clk_enables, ul);
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break;
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default:
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ret = -EINVAL;
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goto unmap_regs;
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}
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/* Reset the PSC into a known state */
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out_8(&psc->command, MPC52xx_PSC_RST_RX);
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out_8(&psc->command, MPC52xx_PSC_RST_TX);
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out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
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/* Disable interrupts, interrupts are based on alarm level */
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out_be16(&psc->mpc52xx_psc_imr, 0);
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out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
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out_8(&psc->rfcntl, 0);
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out_8(&psc->mode, MPC52xx_PSC_MODE_FFULL);
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|
||||
/* Configure 8bit codec mode as a SPI master and use EOF flags */
|
||||
/* SICR_SIM_CODEC8|SICR_GENCLK|SICR_SPI|SICR_MSTR|SICR_USEEOF */
|
||||
out_be32(&psc->sicr, 0x0180C800);
|
||||
out_be16(&psc->ccr, 0x070F); /* by default SPI Clk 1MHz */
|
||||
|
||||
/* Set 2ms DTL delay */
|
||||
out_8(&psc->ctur, 0x00);
|
||||
out_8(&psc->ctlr, 0x84);
|
||||
|
||||
mps->bits_per_word = 8;
|
||||
|
||||
unmap_regs:
|
||||
if (cdm)
|
||||
iounmap(cdm);
|
||||
if (gpio)
|
||||
iounmap(gpio);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static irqreturn_t mpc52xx_psc_spi_isr(int irq, void *dev_id)
|
||||
{
|
||||
struct mpc52xx_psc_spi *mps = (struct mpc52xx_psc_spi *)dev_id;
|
||||
struct mpc52xx_psc __iomem *psc = mps->psc;
|
||||
|
||||
/* disable interrupt and wake up the work queue */
|
||||
if (in_be16(&psc->mpc52xx_psc_isr) & MPC52xx_PSC_IMR_RXRDY) {
|
||||
out_be16(&psc->mpc52xx_psc_imr, 0);
|
||||
complete(&mps->done);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
/* bus_num is used only for the case dev->platform_data == NULL */
|
||||
static int __init mpc52xx_psc_spi_do_probe(struct device *dev, u32 regaddr,
|
||||
u32 size, unsigned int irq, s16 bus_num)
|
||||
{
|
||||
struct fsl_spi_platform_data *pdata = dev->platform_data;
|
||||
struct mpc52xx_psc_spi *mps;
|
||||
struct spi_master *master;
|
||||
int ret;
|
||||
|
||||
if (pdata == NULL)
|
||||
return -ENODEV;
|
||||
|
||||
master = spi_alloc_master(dev, sizeof *mps);
|
||||
if (master == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
dev_set_drvdata(dev, master);
|
||||
mps = spi_master_get_devdata(master);
|
||||
|
||||
mps->irq = irq;
|
||||
if (pdata == NULL) {
|
||||
dev_warn(dev, "probe called without platform data, no "
|
||||
"(de)activate_cs function will be called\n");
|
||||
mps->activate_cs = NULL;
|
||||
mps->deactivate_cs = NULL;
|
||||
mps->sysclk = 0;
|
||||
master->bus_num = bus_num;
|
||||
master->num_chipselect = 255;
|
||||
} else {
|
||||
mps->activate_cs = pdata->activate_cs;
|
||||
mps->deactivate_cs = pdata->deactivate_cs;
|
||||
mps->sysclk = pdata->sysclk;
|
||||
master->bus_num = pdata->bus_num;
|
||||
master->num_chipselect = pdata->max_chipselect;
|
||||
}
|
||||
master->setup = mpc52xx_psc_spi_setup;
|
||||
master->transfer = mpc52xx_psc_spi_transfer;
|
||||
master->cleanup = mpc52xx_psc_spi_cleanup;
|
||||
|
||||
mps->psc = ioremap(regaddr, size);
|
||||
if (!mps->psc) {
|
||||
dev_err(dev, "could not ioremap I/O port range\n");
|
||||
ret = -EFAULT;
|
||||
goto free_master;
|
||||
}
|
||||
|
||||
ret = request_irq(mps->irq, mpc52xx_psc_spi_isr, 0, "mpc52xx-psc-spi",
|
||||
mps);
|
||||
if (ret)
|
||||
goto free_master;
|
||||
|
||||
ret = mpc52xx_psc_spi_port_config(master->bus_num, mps);
|
||||
if (ret < 0)
|
||||
goto free_irq;
|
||||
|
||||
spin_lock_init(&mps->lock);
|
||||
init_completion(&mps->done);
|
||||
INIT_WORK(&mps->work, mpc52xx_psc_spi_work);
|
||||
INIT_LIST_HEAD(&mps->queue);
|
||||
|
||||
mps->workqueue = create_singlethread_workqueue(
|
||||
master->cdev.dev->bus_id);
|
||||
if (mps->workqueue == NULL) {
|
||||
ret = -EBUSY;
|
||||
goto free_irq;
|
||||
}
|
||||
|
||||
ret = spi_register_master(master);
|
||||
if (ret < 0)
|
||||
goto unreg_master;
|
||||
|
||||
return ret;
|
||||
|
||||
unreg_master:
|
||||
destroy_workqueue(mps->workqueue);
|
||||
free_irq:
|
||||
free_irq(mps->irq, mps);
|
||||
free_master:
|
||||
if (mps->psc)
|
||||
iounmap(mps->psc);
|
||||
spi_master_put(master);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __exit mpc52xx_psc_spi_do_remove(struct device *dev)
|
||||
{
|
||||
struct spi_master *master = dev_get_drvdata(dev);
|
||||
struct mpc52xx_psc_spi *mps = spi_master_get_devdata(master);
|
||||
|
||||
flush_workqueue(mps->workqueue);
|
||||
destroy_workqueue(mps->workqueue);
|
||||
spi_unregister_master(master);
|
||||
free_irq(mps->irq, mps);
|
||||
if (mps->psc)
|
||||
iounmap(mps->psc);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if !defined(CONFIG_PPC_MERGE)
|
||||
static int __init mpc52xx_psc_spi_probe(struct platform_device *dev)
|
||||
{
|
||||
switch(dev->id) {
|
||||
case 1:
|
||||
case 2:
|
||||
case 3:
|
||||
case 6:
|
||||
return mpc52xx_psc_spi_do_probe(&dev->dev,
|
||||
MPC52xx_PA(MPC52xx_PSCx_OFFSET(dev->id)),
|
||||
MPC52xx_PSC_SIZE, platform_get_irq(dev, 0), dev->id);
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
static int __exit mpc52xx_psc_spi_remove(struct platform_device *dev)
|
||||
{
|
||||
return mpc52xx_psc_spi_do_remove(&dev->dev);
|
||||
}
|
||||
|
||||
static struct platform_driver mpc52xx_psc_spi_platform_driver = {
|
||||
.remove = __exit_p(mpc52xx_psc_spi_remove),
|
||||
.driver = {
|
||||
.name = "mpc52xx-psc-spi",
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init mpc52xx_psc_spi_init(void)
|
||||
{
|
||||
return platform_driver_probe(&mpc52xx_psc_spi_platform_driver,
|
||||
mpc52xx_psc_spi_probe);
|
||||
}
|
||||
module_init(mpc52xx_psc_spi_init);
|
||||
|
||||
static void __exit mpc52xx_psc_spi_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&mpc52xx_psc_spi_platform_driver);
|
||||
}
|
||||
module_exit(mpc52xx_psc_spi_exit);
|
||||
|
||||
#else /* defined(CONFIG_PPC_MERGE) */
|
||||
|
||||
static int __init mpc52xx_psc_spi_of_probe(struct of_device *op,
|
||||
const struct of_device_id *match)
|
||||
{
|
||||
const u32 *regaddr_p;
|
||||
u64 regaddr64, size64;
|
||||
s16 id = -1;
|
||||
|
||||
regaddr_p = of_get_address(op->node, 0, &size64, NULL);
|
||||
if (!regaddr_p) {
|
||||
printk(KERN_ERR "Invalid PSC address\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
regaddr64 = of_translate_address(op->node, regaddr_p);
|
||||
|
||||
if (op->dev.platform_data == NULL) {
|
||||
struct device_node *np;
|
||||
int i = 0;
|
||||
|
||||
for_each_node_by_type(np, "spi") {
|
||||
if (of_find_device_by_node(np) == op) {
|
||||
id = i;
|
||||
break;
|
||||
}
|
||||
i++;
|
||||
}
|
||||
}
|
||||
|
||||
return mpc52xx_psc_spi_do_probe(&op->dev, (u32)regaddr64, (u32)size64,
|
||||
irq_of_parse_and_map(op->node, 0), id);
|
||||
}
|
||||
|
||||
static int __exit mpc52xx_psc_spi_of_remove(struct of_device *op)
|
||||
{
|
||||
return mpc52xx_psc_spi_do_remove(&op->dev);
|
||||
}
|
||||
|
||||
static struct of_device_id mpc52xx_psc_spi_of_match[] = {
|
||||
{ .type = "spi", .compatible = "mpc52xx-psc-spi", },
|
||||
{},
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(of, mpc52xx_psc_spi_of_match);
|
||||
|
||||
static struct of_platform_driver mpc52xx_psc_spi_of_driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = "mpc52xx-psc-spi",
|
||||
.match_table = mpc52xx_psc_spi_of_match,
|
||||
.probe = mpc52xx_psc_spi_of_probe,
|
||||
.remove = __exit_p(mpc52xx_psc_spi_of_remove),
|
||||
.driver = {
|
||||
.name = "mpc52xx-psc-spi",
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init mpc52xx_psc_spi_init(void)
|
||||
{
|
||||
return of_register_platform_driver(&mpc52xx_psc_spi_of_driver);
|
||||
}
|
||||
module_init(mpc52xx_psc_spi_init);
|
||||
|
||||
static void __exit mpc52xx_psc_spi_exit(void)
|
||||
{
|
||||
of_unregister_platform_driver(&mpc52xx_psc_spi_of_driver);
|
||||
}
|
||||
module_exit(mpc52xx_psc_spi_exit);
|
||||
|
||||
#endif /* defined(CONFIG_PPC_MERGE) */
|
||||
|
||||
MODULE_AUTHOR("Dragos Carp");
|
||||
MODULE_DESCRIPTION("MPC52xx PSC SPI Driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Reference in New Issue
Block a user