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mt7623:
- fix style issues of the dts - add cpu clock properties - add PCI controller - add mt7623 reference board banapi-r2: - enable missing uarts - fix regulator for mmc - fix USB initialization -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAlqvir0XHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00NezQ//SKVPq3OtXyvTqF2m/tHhdr2j JrRjfqA+jlesJdHSHKGrjKnTtDLBdPvYR8qrit9+GyL6abNXv4VTLMMkUWKFceVU dk66A7a48Vw/QLjZKYcGVnHFY8lZFjko5dtQNhALX1uvZzGXpoIgN8IYuXD/S/HR vMUxM9aKErmKfaX8AOTHiGhLo3Wo70n0GKh0MDT0WyC5HDkp5nLRGhTc9nE+45fw dFcdKCe2O6AY8HRxi/l1ZieWaZxWQ/T3T6JyVys4P6skwMFwVvDj/Kkp+f6R0koN NGB9wPUdnuHDeRGUFtYjZXEXOZWlgGaVEY/T9P0R3i014Nb79s6sSLqwxX1Gwkog IAIOjsAkvcOi3DZCP2NhB6hpCwAx2G1jwACoBKt/THgQMjDRPjD2s4srtX9kqypn BaZKHzcwlk8JyMm/ZqIRAeBu1BaV1Z/fDaMxeJMXbEEIhDt6nVE6F53tlbUyHUI8 o1t3fjiVntuB9JCrLh8kyhfNx+jv+vfSRDD40q3sqjcejt4HebZjnqglXVkCuCc8 E1n1Q0dHVdMGdqxBibZLmPDq2AvY6vCI3X9MK8xNQ7yshSFTOzpLCxZR6OUavmHr HIufRikFMJzQEOHg8msCeqGisbgpnszx+VfLY9FWdMx3G4M103e/nYY4c3sdW+rx 0N1cZ+xoTAtxHyKZZe0= =KWpa -----END PGP SIGNATURE----- Merge tag 'v4.16-next-dts32' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/dt Pull "ARM: mediatek: dts32 updates for v4.16-next" from Matthias Brugger: mt7623: - fix style issues of the dts - add cpu clock properties - add PCI controller - add mt7623 reference board banapi-r2: - enable missing uarts - fix regulator for mmc - fix USB initialization * tag 'v4.16-next-dts32' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: arm: dts: mt7623: add PCIe related nodes arm: dts: mt7623: use - instead of _ in DT node name arm: dts: mt7623: remove useless property pinctrl-names at node switch@0 arm: dts: mt7623: add related clock properties to cpu[1-3] nodes arm: dts: mt7623: enable three available UARTs on bananapi-r2 arm: dts: mt7623: fix the regulators mmc should use on bananapi-r2 arm: dts: mt7623: fix USB initialization fails on bananapi-r2 dt-bindings: arm: mediatek: add support for more mt7623 reference boards
This commit is contained in:
Arnd Bergmann
commit
00730c5be8
@ -50,6 +50,15 @@ Supported boards:
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- Reference board variant 1 for MT7622:
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Required root node properties:
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- compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
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- Reference board for MT7623a with eMMC:
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Required root node properties:
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- compatible = "mediatek,mt7623a-rfb-emmc", "mediatek,mt7623";
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- Reference board for MT7623a with NAND:
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Required root node properties:
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- compatible = "mediatek,mt7623a-rfb-nand", "mediatek,mt7623";
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- Reference board for MT7623n with eMMC:
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Required root node properties:
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- compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
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- Reference board for MT7623n with NAND:
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Required root node properties:
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- compatible = "mediatek,mt7623n-rfb-nand", "mediatek,mt7623";
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@ -28,7 +28,7 @@
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compatible = "mediatek,mt7623";
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interrupt-parent = <&sysirq>;
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cpu_opp_table: opp_table {
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cpu_opp_table: opp-table {
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compatible = "operating-points-v2";
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opp-shared;
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@ -96,6 +96,9 @@
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x1>;
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clocks = <&infracfg CLK_INFRA_CPUSEL>,
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<&apmixedsys CLK_APMIXED_MAINPLL>;
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clock-names = "cpu", "intermediate";
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operating-points-v2 = <&cpu_opp_table>;
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clock-frequency = <1300000000>;
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};
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@ -104,6 +107,9 @@
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x2>;
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clocks = <&infracfg CLK_INFRA_CPUSEL>,
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<&apmixedsys CLK_APMIXED_MAINPLL>;
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clock-names = "cpu", "intermediate";
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operating-points-v2 = <&cpu_opp_table>;
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clock-frequency = <1300000000>;
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};
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@ -112,6 +118,9 @@
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x3>;
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clocks = <&infracfg CLK_INFRA_CPUSEL>,
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<&apmixedsys CLK_APMIXED_MAINPLL>;
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clock-names = "cpu", "intermediate";
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operating-points-v2 = <&cpu_opp_table>;
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clock-frequency = <1300000000>;
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};
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@ -138,32 +147,32 @@
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};
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thermal-zones {
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cpu_thermal: cpu_thermal {
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cpu_thermal: cpu-thermal {
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polling-delay-passive = <1000>;
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polling-delay = <1000>;
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thermal-sensors = <&thermal 0>;
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trips {
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cpu_passive: cpu_passive {
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cpu_passive: cpu-passive {
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temperature = <47000>;
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hysteresis = <2000>;
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type = "passive";
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};
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cpu_active: cpu_active {
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cpu_active: cpu-active {
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temperature = <67000>;
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hysteresis = <2000>;
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type = "active";
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};
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cpu_hot: cpu_hot {
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cpu_hot: cpu-hot {
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temperature = <87000>;
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hysteresis = <2000>;
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type = "hot";
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};
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cpu_crit {
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cpu-crit {
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temperature = <107000>;
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hysteresis = <2000>;
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type = "critical";
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@ -670,6 +679,111 @@
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#reset-cells = <1>;
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};
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pcie: pcie@1a140000 {
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compatible = "mediatek,mt7623-pcie";
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device_type = "pci";
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reg = <0 0x1a140000 0 0x1000>, /* PCIe shared registers */
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<0 0x1a142000 0 0x1000>, /* Port0 registers */
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<0 0x1a143000 0 0x1000>, /* Port1 registers */
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<0 0x1a144000 0 0x1000>; /* Port2 registers */
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reg-names = "subsys", "port0", "port1", "port2";
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0xf800 0 0 0>;
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interrupt-map = <0x0000 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>,
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<0x0800 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>,
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<0x1000 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
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<&hifsys CLK_HIFSYS_PCIE0>,
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<&hifsys CLK_HIFSYS_PCIE1>,
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<&hifsys CLK_HIFSYS_PCIE2>;
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clock-names = "free_ck", "sys_ck0", "sys_ck1", "sys_ck2";
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resets = <&hifsys MT2701_HIFSYS_PCIE0_RST>,
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<&hifsys MT2701_HIFSYS_PCIE1_RST>,
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<&hifsys MT2701_HIFSYS_PCIE2_RST>;
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reset-names = "pcie-rst0", "pcie-rst1", "pcie-rst2";
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phys = <&pcie0_port PHY_TYPE_PCIE>,
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<&pcie1_port PHY_TYPE_PCIE>,
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<&u3port1 PHY_TYPE_PCIE>;
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phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2";
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power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>;
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bus-range = <0x00 0xff>;
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status = "disabled";
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ranges = <0x81000000 0 0x1a160000 0 0x1a160000 0 0x00010000
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0x83000000 0 0x60000000 0 0x60000000 0 0x10000000>;
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pcie@0,0 {
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reg = <0x0000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>;
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ranges;
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num-lanes = <1>;
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status = "disabled";
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};
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pcie@1,0 {
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reg = <0x0800 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>;
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ranges;
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num-lanes = <1>;
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status = "disabled";
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};
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pcie@2,0 {
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reg = <0x1000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>;
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ranges;
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num-lanes = <1>;
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status = "disabled";
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};
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};
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pcie0_phy: pcie-phy@1a149000 {
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compatible = "mediatek,generic-tphy-v1";
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reg = <0 0x1a149000 0 0x0700>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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status = "disabled";
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pcie0_port: pcie-phy@1a149900 {
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reg = <0 0x1a149900 0 0x0700>;
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clocks = <&clk26m>;
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clock-names = "ref";
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#phy-cells = <1>;
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status = "okay";
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};
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};
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pcie1_phy: pcie-phy@1a14a000 {
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compatible = "mediatek,generic-tphy-v1";
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reg = <0 0x1a14a000 0 0x0700>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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status = "disabled";
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pcie1_port: pcie-phy@1a14a900 {
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reg = <0 0x1a14a900 0 0x0700>;
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clocks = <&clk26m>;
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clock-names = "ref";
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#phy-cells = <1>;
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status = "okay";
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};
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};
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usb1: usb@1a1c0000 {
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compatible = "mediatek,mt7623-xhci",
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"mediatek,mt8173-xhci";
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@ -39,7 +39,34 @@
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};
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};
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gpio_keys {
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_5v: regulator-5v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&key_pins_a>;
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@ -120,7 +147,6 @@
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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pinctrl-names = "default";
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reset-gpios = <&pio 33 0>;
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core-supply = <&mt6323_vpa_reg>;
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io-supply = <&mt6323_vemc3v3_reg>;
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@ -191,8 +217,8 @@
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bus-width = <8>;
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max-frequency = <50000000>;
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cap-mmc-highspeed;
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vmmc-supply = <&mt6323_vemc3v3_reg>;
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vqmmc-supply = <&mt6323_vio18_reg>;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_1p8v>;
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non-removable;
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};
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@ -205,20 +231,42 @@
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max-frequency = <50000000>;
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cap-sd-highspeed;
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cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
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vmmc-supply = <&mt6323_vmch_reg>;
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vqmmc-supply = <&mt6323_vio18_reg>;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_3p3v>;
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_default>;
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status = "okay";
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pcie@0,0 {
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status = "okay";
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};
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pcie@1,0 {
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status = "okay";
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};
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};
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&pcie0_phy {
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status = "okay";
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};
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&pcie1_phy {
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status = "okay";
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};
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&pio {
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cir_pins_a:cir@0 {
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pins_cir {
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pins-cir {
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pinmux = <MT7623_PIN_46_IR_FUNC_IR>;
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bias-disable;
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};
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};
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i2c0_pins_a: i2c@0 {
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pins_i2c0 {
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pins-i2c0 {
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pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
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<MT7623_PIN_76_SCL0_FUNC_SCL0>;
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bias-disable;
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@ -226,7 +274,7 @@
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};
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i2c1_pins_a: i2c@1 {
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pin_i2c1 {
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pin-i2c1 {
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pinmux = <MT7623_PIN_57_SDA1_FUNC_SDA1>,
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<MT7623_PIN_58_SCL1_FUNC_SCL1>;
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bias-disable;
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@ -234,7 +282,7 @@
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};
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i2s0_pins_a: i2s@0 {
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pin_i2s0 {
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pin-i2s0 {
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pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,
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<MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>,
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<MT7623_PIN_73_I2S0_LRCK_FUNC_I2S0_LRCK>,
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@ -246,7 +294,7 @@
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};
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i2s1_pins_a: i2s@1 {
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pin_i2s1 {
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pin-i2s1 {
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pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>,
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<MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>,
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<MT7623_PIN_35_I2S1_BCK_FUNC_I2S1_BCK>,
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@ -258,7 +306,7 @@
|
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};
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|
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key_pins_a: keys@0 {
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pins_keys {
|
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pins-keys {
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pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
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<MT7623_PIN_257_GPIO257_FUNC_GPIO257> ;
|
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input-enable;
|
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@ -266,7 +314,7 @@
|
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};
|
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|
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led_pins_a: leds@0 {
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pins_leds {
|
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pins-leds {
|
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pinmux = <MT7623_PIN_239_EXT_SDIO0_FUNC_GPIO239>,
|
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<MT7623_PIN_240_EXT_XCS_FUNC_GPIO240>,
|
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<MT7623_PIN_241_EXT_SCK_FUNC_GPIO241>;
|
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@ -274,7 +322,7 @@
|
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};
|
||||
|
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mmc0_pins_default: mmc0default {
|
||||
pins_cmd_dat {
|
||||
pins-cmd-dat {
|
||||
pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
|
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<MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
|
||||
<MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
|
||||
@ -288,19 +336,19 @@
|
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bias-pull-up;
|
||||
};
|
||||
|
||||
pins_clk {
|
||||
pins-clk {
|
||||
pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
|
||||
bias-pull-down;
|
||||
};
|
||||
|
||||
pins_rst {
|
||||
pins-rst {
|
||||
pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
mmc0_pins_uhs: mmc0 {
|
||||
pins_cmd_dat {
|
||||
pins-cmd-dat {
|
||||
pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
|
||||
<MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
|
||||
<MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
|
||||
@ -315,20 +363,20 @@
|
||||
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
||||
};
|
||||
|
||||
pins_clk {
|
||||
pins-clk {
|
||||
pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
|
||||
drive-strength = <MTK_DRIVE_2mA>;
|
||||
bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
|
||||
};
|
||||
|
||||
pins_rst {
|
||||
pins-rst {
|
||||
pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
mmc1_pins_default: mmc1default {
|
||||
pins_cmd_dat {
|
||||
pins-cmd-dat {
|
||||
pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
|
||||
<MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
|
||||
<MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
|
||||
@ -339,26 +387,26 @@
|
||||
bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
|
||||
};
|
||||
|
||||
pins_clk {
|
||||
pins-clk {
|
||||
pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
|
||||
bias-pull-down;
|
||||
drive-strength = <MTK_DRIVE_4mA>;
|
||||
};
|
||||
|
||||
pins_wp {
|
||||
pins-wp {
|
||||
pinmux = <MT7623_PIN_29_EINT7_FUNC_MSDC1_WP>;
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
pins_insert {
|
||||
pins-insert {
|
||||
pinmux = <MT7623_PIN_261_MSDC1_INS_FUNC_GPIO261>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
mmc1_pins_uhs: mmc1 {
|
||||
pins_cmd_dat {
|
||||
pins-cmd-dat {
|
||||
pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
|
||||
<MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
|
||||
<MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
|
||||
@ -369,15 +417,23 @@
|
||||
bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
|
||||
};
|
||||
|
||||
pins_clk {
|
||||
pins-clk {
|
||||
pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
|
||||
drive-strength = <MTK_DRIVE_4mA>;
|
||||
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie_default: pcie_pin_default {
|
||||
pins_cmd_dat {
|
||||
pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
|
||||
<MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
pwm_pins_a: pwm@0 {
|
||||
pins_pwm {
|
||||
pins-pwm {
|
||||
pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
|
||||
<MT7623_PIN_204_PWM1_FUNC_PWM1>,
|
||||
<MT7623_PIN_205_PWM2_FUNC_PWM2>,
|
||||
@ -387,7 +443,7 @@
|
||||
};
|
||||
|
||||
spi0_pins_a: spi@0 {
|
||||
pins_spi {
|
||||
pins-spi {
|
||||
pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
|
||||
<MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,
|
||||
<MT7623_PIN_55_SPI0_MI_FUNC_SPI0_MI>,
|
||||
@ -397,18 +453,25 @@
|
||||
};
|
||||
|
||||
uart0_pins_a: uart@0 {
|
||||
pins_dat {
|
||||
pins-dat {
|
||||
pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
|
||||
<MT7623_PIN_80_UTXD0_FUNC_UTXD0>;
|
||||
};
|
||||
};
|
||||
|
||||
uart1_pins_a: uart@1 {
|
||||
pins_dat {
|
||||
pins-dat {
|
||||
pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
|
||||
<MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
|
||||
};
|
||||
};
|
||||
|
||||
uart2_pins_a: uart@2 {
|
||||
pins-dat {
|
||||
pinmux = <MT7623_PIN_14_GPIO14_FUNC_URXD2>,
|
||||
<MT7623_PIN_15_GPIO15_FUNC_UTXD2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwm {
|
||||
@ -454,26 +517,30 @@
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins_a>;
|
||||
status = "disabled";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins_a>;
|
||||
status = "disabled";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins_a>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
vusb33-supply = <&mt6323_vusb_reg>;
|
||||
vusb33-supply = <®_3p3v>;
|
||||
vbus-supply = <®_5v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
vusb33-supply = <&mt6323_vusb_reg>;
|
||||
vusb33-supply = <®_3p3v>;
|
||||
vbus-supply = <®_5v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@ -81,13 +81,13 @@
|
||||
|
||||
&pio {
|
||||
nand_pins_default: nanddefault {
|
||||
pins_ale {
|
||||
pins-ale {
|
||||
pinmux = <MT7623_PIN_116_MSDC0_CMD_FUNC_NALE>;
|
||||
drive-strength = <MTK_DRIVE_8mA>;
|
||||
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
|
||||
};
|
||||
|
||||
pins_dat {
|
||||
pins-dat {
|
||||
pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_NLD7>,
|
||||
<MT7623_PIN_112_MSDC0_DAT6_FUNC_NLD6>,
|
||||
<MT7623_PIN_114_MSDC0_DAT4_FUNC_NLD4>,
|
||||
@ -102,7 +102,7 @@
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
pins_we {
|
||||
pins-we {
|
||||
pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_NWEB>;
|
||||
drive-strength = <MTK_DRIVE_8mA>;
|
||||
bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user