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[ARM] omap: make sure virtual mmio addresses are __iomem pointer-like
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -34,9 +34,9 @@ extern void omap1510_fpga_init_irq(void);
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* ---------------------------------------------------------------------------
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*/
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/* maps in the FPGA registers and the ETHR registers */
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#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */
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#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */
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#define H2P2_DBG_FPGA_START 0x04000000 /* PA */
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#define H2P2_DBG_FPGA_BASE IOMEM(0xE8000000) /* VA */
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#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */
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#define H2P2_DBG_FPGA_START 0x04000000 /* PA */
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#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300)
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#define H2P2_DBG_FPGA_FPGA_REV (H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */
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@ -85,9 +85,9 @@ struct h2p2_dbg_fpga {
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* OMAP-1510 FPGA
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* ---------------------------------------------------------------------------
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*/
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#define OMAP1510_FPGA_BASE 0xE8000000 /* Virtual */
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#define OMAP1510_FPGA_SIZE SZ_4K
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#define OMAP1510_FPGA_START 0x08000000 /* Physical */
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#define OMAP1510_FPGA_BASE IOMEM(0xE8000000) /* VA */
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#define OMAP1510_FPGA_SIZE SZ_4K
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#define OMAP1510_FPGA_START 0x08000000 /* PA */
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/* Revision */
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#define OMAP1510_FPGA_REV_LOW (OMAP1510_FPGA_BASE + 0x0)
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@ -89,7 +89,7 @@
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#define DPLL_CTL (0xfffecf00)
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/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */
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#define DSP_CONFIG_REG_BASE (0xe1008000)
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#define DSP_CONFIG_REG_BASE IOMEM(0xe1008000)
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#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0)
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#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4)
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#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8)
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