watchdog: ziirave_wdt: Fix RESET_PROCESSOR payload

Bootloader firmware expects the following traffic for
RESET_PROCESSOR:

S Addr Wr [A] 0x0b [A] 0x01 [A] P

using ziirave_firm_write_byte() will result in

S Addr Wr [A] 0x0b [A] 0x01 [A] 0x01 [A] P

which happens to work because firmware will ignore any extra bytes and
expected magic value matches byte count sent by
i2c_smbus_write_block_data(). Fix this by converting the code to use
i2c_smbus_write_byte_data() instead.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Rick Ramstetter <rick@anteaterllc.com>
Cc: linux-watchdog@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20190812200906.31344-19-andrew.smirnov@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
This commit is contained in:
Andrey Smirnov 2019-08-12 13:09:02 -07:00 committed by Wim Van Sebroeck
parent c47825fb72
commit 0007cbd517

View File

@ -73,6 +73,7 @@ static char *ziirave_reasons[] = {"power cycle", "hw watchdog", NULL, NULL,
#define ZIIRAVE_CMD_DOWNLOAD_PACKET 0x0e
#define ZIIRAVE_CMD_JUMP_TO_BOOTLOADER_MAGIC 1
#define ZIIRAVE_CMD_RESET_PROCESSOR_MAGIC 1
#define ZIIRAVE_FW_VERSION_FMT "02.%02u.%02u"
#define ZIIRAVE_BL_VERSION_FMT "01.%02u.%02u"
@ -433,8 +434,9 @@ static int ziirave_firm_upload(struct watchdog_device *wdd,
}
/* Reset the processor */
ret = ziirave_firm_write_byte(wdd, ZIIRAVE_CMD_RESET_PROCESSOR, 1,
false);
ret = i2c_smbus_write_byte_data(client,
ZIIRAVE_CMD_RESET_PROCESSOR,
ZIIRAVE_CMD_RESET_PROCESSOR_MAGIC);
if (ret) {
dev_err(&client->dev,
"Failed to reset the watchdog: %d\n", ret);