linux/drivers/iio/adc/Makefile

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#
# Makefile for IIO ADC drivers
#
# When adding new entries keep the list in alphabetical order
obj-$(CONFIG_AD_SIGMA_DELTA) += ad_sigma_delta.o
obj-$(CONFIG_AD7266) += ad7266.o
obj-$(CONFIG_AD7291) += ad7291.o
obj-$(CONFIG_AD7298) += ad7298.o
obj-$(CONFIG_AD7923) += ad7923.o
obj-$(CONFIG_AD7476) += ad7476.o
obj-$(CONFIG_AD7766) += ad7766.o
obj-$(CONFIG_AD7791) += ad7791.o
obj-$(CONFIG_AD7793) += ad7793.o
obj-$(CONFIG_AD7887) += ad7887.o
obj-$(CONFIG_AD799X) += ad799x.o
obj-$(CONFIG_ASPEED_ADC) += aspeed_adc.o
obj-$(CONFIG_AT91_ADC) += at91_adc.o
obj-$(CONFIG_AT91_SAMA5D2_ADC) += at91-sama5d2_adc.o
obj-$(CONFIG_AXP20X_ADC) += axp20x_adc.o
obj-$(CONFIG_AXP288_ADC) += axp288_adc.o
obj-$(CONFIG_BCM_IPROC_ADC) += bcm_iproc_adc.o
obj-$(CONFIG_BERLIN2_ADC) += berlin2-adc.o
obj-$(CONFIG_CC10001_ADC) += cc10001_adc.o
obj-$(CONFIG_CPCAP_ADC) += cpcap-adc.o
obj-$(CONFIG_DA9150_GPADC) += da9150-gpadc.o
obj-$(CONFIG_ENVELOPE_DETECTOR) += envelope-detector.o
obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o
obj-$(CONFIG_FSL_MX25_ADC) += fsl-imx25-gcq.o
obj-$(CONFIG_HI8435) += hi8435.o
obj-$(CONFIG_HX711) += hx711.o
obj-$(CONFIG_IMX7D_ADC) += imx7d_adc.o
obj-$(CONFIG_INA2XX_ADC) += ina2xx-adc.o
iio: adc: add new lp8788 adc driver TI LP8788 PMU provides regulators, battery charger, ADC, RTC, backlight driver and current sinks. This patch enables the LP8788 ADC functions. The LP8788 ADC has several ADC input selection and supports 12bit resolution. Internal operation of getting ADC is access to registers of LP8788. The LP8788 ADC uses exported functions for accessing these registers. (exported by LP8788 MFD device driver) This driver supports IIO_CHAN_INFO_RAW and SCALE. So the IIO consumer can calculate the value with raw and scale. The unit of scale is micro. (ADC Input Selection) Voltage: battery voltage (MAX 5.0, 5.5 and 6.0V) charger input voltage four general ADC inputs coin cell voltage Current: battery charging current Temperature: IC temperature (The IIO map for the IIO consumer) The ADC input is configurable in the platform side. Even though this platform data is not defined, the default IIO map is created for supporting the power supply driver. The battery voltage and temperature are used inside this driver. (History) Patch v6. (a) Fix scale value for each ADC input selection Voltage and current type are mili unit and temperature is degree. To calculate the IC temperature, temp = raw * scaleint + (raw * scalepart)/ 1000000, scaleint is always 0. = raw * 0.061050, raw: 0 ~ 4095 Then range of IC temperature(ADC result) is 0 ~ 250'C (b) Reorganization of the IIO channel Spec Remove address, scan_type and scan_index and rollback the datasheet name. The reason why 'address' field is unnecessary is no relation with each channel. Moreover, to get the raw ADC value, the address info is not only one register but also several registers. Therefore specific function(lp8788_get_adc_result) is called rather than using one 'address' field. (c) Fix coding style Remove duplicated checking routine while unregistering the IIO map. Fix code for space and parenthesis. Patch v5. Fix default consumer name as 'lp8788-charger'. Add mutex for ADC read operation. Reorganization on lp8788_adc_read_raw(). Patch v4. Fix adc_raw function: support RAW and SCALE channel info. Change LP8788 ADC platform data - iio map. Enables the default IIO map. Patch v3. Fix wrong size of allocating iio private data. Fix coding styles. Patch v2. Support RAW and SCALE interface for IIO consumer. Clean up the iio channel spec macro. Signed-off-by: Milo(Woogyom) Kim <milo.kim@ti.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2012-09-17 09:35:00 +00:00
obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
obj-$(CONFIG_LPC18XX_ADC) += lpc18xx_adc.o
obj-$(CONFIG_LPC32XX_ADC) += lpc32xx_adc.o
obj-$(CONFIG_LTC2485) += ltc2485.o
obj-$(CONFIG_LTC2497) += ltc2497.o
obj-$(CONFIG_MAX1027) += max1027.o
obj-$(CONFIG_MAX11100) += max11100.o
iio: adc: add max1117/max1118/max1119 ADC driver This adds max1117/max1118/max1119 8-bit, dual-channel ADC driver. This new driver uses the zero length spi_transfers with the cs_change flag set and/or the non-zero delay_usecs. 1. The zero length transfer with the spi_transfer.cs_change set is required in order to select CH1. The chip select line must be brought high and low again without transfer. 2. The zero length transfer with the spi_transfer.delay_usecs > 0 is required for waiting the conversion to be complete. The conversion begins with the falling edge of the chip select. During the conversion process, SCLK is ignored. These two usages are unusual. But the spi controller drivers that use a default implementation of transfer_one_message() are likely to work. (I've tested this adc driver with spi-omap2-mcspi and spi-xilinx) On the other hand, some spi controller drivers that have their own transfer_one_message() may not work. But at least for the zero length transfer with delay_usecs > 0, I'm proposing a new testcase for the spi-loopback-test that can test whether the delay_usecs setting has taken effect. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Jonathan Cameron <jic23@kernel.org> Cc: Hartmut Knaack <knaack.h@gmx.de> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Peter Meerwald-Stadler <pmeerw@pmeerw.net> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-03-28 16:34:48 +00:00
obj-$(CONFIG_MAX1118) += max1118.o
obj-$(CONFIG_MAX1363) += max1363.o
obj-$(CONFIG_MAX9611) += max9611.o
obj-$(CONFIG_MCP320X) += mcp320x.o
obj-$(CONFIG_MCP3422) += mcp3422.o
obj-$(CONFIG_MEDIATEK_MT6577_AUXADC) += mt6577_auxadc.o
obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o
iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs This adds support for the SAR (Successive Approximation Register) ADC on the Amlogic Meson SoCs. The code is based on the public S805 (Meson8b) and S905 (GXBB) datasheets (see [0] and [1]), as well as by reading (various versions of) the vendor driver and by inspecting the registers on the vendor kernels of my testing-hardware. Currently the GXBB, GXL and GXM SoCs are supported. GXBB hardware has 10-bit ADC resolution, while GXL and GXM have 12-bit ADC resolution. The code was written to support older SoCs (Meson8 and Meson8b) as well, but due to lack of actual testing-hardware no of_device_id was added for these. Two "features" from the vendor driver are currently missing: - the vendor driver uses channel #7 for calibration (this improves the accuracy of the results - in my tests the results were less than 3% off without calibration compared to the vendor driver). Adding support for this should be easy, but is not required for most applications. - channel #6 is connected to the SoCs internal temperature sensor. Adding support for this is probably not so easy since (based on the u-boot sources) most SoC versions are using different registers and algorithms for the conversion from "ADC value" to temperature. Supported by the hardware but currently not supported by the driver: - reading multiple channels at the same time (the hardware has a FIFO buffer which stores multiple results) - continuous sampling (this would require a way to enable this individually because otherwise the ADC would be drawing power constantly) - interrupt support (similar to the vendor driver this new driver is polling the results. It is unclear if the IRQ-mode is supported on older (Meson6 or Meson8) hardware as well or if there are any errata) [0] http://dn.odroid.com/S805/Datasheet/S805_Datasheet%20V0.8%2020150126.pdf [1] http://dn.odroid.com/S905/DataSheet/S905_Public_Datasheet_V1.1.4.pdf Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-01-22 18:17:13 +00:00
obj-$(CONFIG_MESON_SARADC) += meson_saradc.o
obj-$(CONFIG_MXS_LRADC_ADC) += mxs-lradc-adc.o
obj-$(CONFIG_NAU7802) += nau7802.o
obj-$(CONFIG_PALMAS_GPADC) += palmas_gpadc.o
obj-$(CONFIG_QCOM_SPMI_IADC) += qcom-spmi-iadc.o
obj-$(CONFIG_QCOM_VADC_COMMON) += qcom-vadc-common.o
obj-$(CONFIG_QCOM_SPMI_VADC) += qcom-spmi-vadc.o
obj-$(CONFIG_QCOM_PM8XXX_XOADC) += qcom-pm8xxx-xoadc.o
obj-$(CONFIG_RCAR_GYRO_ADC) += rcar-gyroadc.o
obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
obj-$(CONFIG_SPEAR_ADC) += spear_adc.o
obj-$(CONFIG_STX104) += stx104.o
obj-$(CONFIG_SUN4I_GPADC) += sun4i-gpadc-iio.o
obj-$(CONFIG_STM32_ADC_CORE) += stm32-adc-core.o
obj-$(CONFIG_STM32_ADC) += stm32-adc.o
obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
obj-$(CONFIG_TI_ADC0832) += ti-adc0832.o
obj-$(CONFIG_TI_ADC084S021) += ti-adc084s021.o
obj-$(CONFIG_TI_ADC12138) += ti-adc12138.o
obj-$(CONFIG_TI_ADC108S102) += ti-adc108s102.o
obj-$(CONFIG_TI_ADC128S052) += ti-adc128s052.o
obj-$(CONFIG_TI_ADC161S626) += ti-adc161s626.o
obj-$(CONFIG_TI_ADS1015) += ti-ads1015.o
obj-$(CONFIG_TI_ADS7950) += ti-ads7950.o
obj-$(CONFIG_TI_ADS8688) += ti-ads8688.o
obj-$(CONFIG_TI_AM335X_ADC) += ti_am335x_adc.o
obj-$(CONFIG_TI_TLC4541) += ti-tlc4541.o
obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o
obj-$(CONFIG_TWL6030_GPADC) += twl6030-gpadc.o
obj-$(CONFIG_VF610_ADC) += vf610_adc.o
This is the MFD patch set for the 3.8 merge window. We have several new drivers, most of the time coming with their sub devices drivers: - Austria Microsystem's AS3711 - Nano River's viperboard - TI's TPS80031, AM335x TS/ADC, - Realtek's MMC/memstick card reader - Nokia's retu We also got some notable cleanups and improvements: - tps6586x got converted to IRQ domains. - tps65910 and tps65090 moved to the regmap IRQ API. - STMPE is now Device Tree aware. - A general twl6040 and twl-core cleanup, with moves to the regmap I/O and IRQ APIs and a conversion to the recently added PWM framework. - sta2x11 gained regmap support. Then the rest is mostly tiny cleanups and fixes, among which we have Mark's wm5xxx and wm8xxx patchset. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJQznPnAAoJEIqAPN1PVmxKuA8P/0nOJduXFM1c0Gy+DD5DnJnG cXzzeSTV8iO3a3sHIye43QPJ5V2YUR5uxLTUEOo/G7my/MoZ/azeNidkUD3qLVlm wVIq35lcS8dWTZaY7nlpBcWc6e39UB0sEueuJNxyhOv5lnMKdi2tAow5f4vIRQnd Q67/EbrgqdltcOpGmVuCdQcvphvWgy+K65jzbJG5zXs7hGX13Q+M5RnYhx76kc8f TDd0APZ71n5/RyISFSBSu2vfl2kES6o47aMgqqXMEHri6d3puAaXM0rFoMzXg/4G eBdxndN25H7rW7xvt9tuUod2rn1AO7tif5d7jal3Cfj61y3iqKY30yb3OzS9XQXH 9WZ2qDst11zvzQivxIkMGvfRXRfncNLWR4DrBSqVfSbYV2uQj2eS8C6ONwKVMXsQ 5tjNp91PFqN19sWQjIjSMcrNswxgpvdQ9mqFTyOGmISbqrpPSTi+MuO8r9+xTfUF PnzUX2nVOW/i9NcI7uotjzh8jiw6t8XMVHhkehiSYR9hzCb6MaPsFPN4jWq9XA2m 1htCHylNpHqHQ3Mup7Is6j0Li1ahdwfm4lbrgiVEA4t4Mqs5E/Ka+3V8laNAKylW PfCP/VmnJYzmgVTK/qobFNeKzRqR0i4WTL6T7oAxGL87Q4TJaqKpEkXWne8UXV+Q yIbN0fmWfCveCetM+vaf =F790 -----END PGP SIGNATURE----- Merge tag 'mfd-3.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6 Pull MFS update from Samuel Ortiz: "This is the MFD patch set for the 3.8 merge window. We have several new drivers, most of the time coming with their sub devices drivers: - Austria Microsystem's AS3711 - Nano River's viperboard - TI's TPS80031, AM335x TS/ADC, - Realtek's MMC/memstick card reader - Nokia's retu We also got some notable cleanups and improvements: - tps6586x got converted to IRQ domains. - tps65910 and tps65090 moved to the regmap IRQ API. - STMPE is now Device Tree aware. - A general twl6040 and twl-core cleanup, with moves to the regmap I/O and IRQ APIs and a conversion to the recently added PWM framework. - sta2x11 gained regmap support. Then the rest is mostly tiny cleanups and fixes, among which we have Mark's wm5xxx and wm8xxx patchset." Far amount of annoying but largely trivial conflicts. Many due to __devinit/exit removal, others due to one or two of the new drivers also having come in through another tree. * tag 'mfd-3.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6: (119 commits) mfd: tps6507x: Convert to devm_kzalloc mfd: stmpe: Update DT support for stmpe driver mfd: wm5102: Add readback of DSP status 3 register mfd: arizona: Log if we fail to create the primary IRQ domain mfd: tps80031: MFD_TPS80031 needs to select REGMAP_IRQ mfd: tps80031: Add terminating entry for tps80031_id_table mfd: sta2x11: Fix potential NULL pointer dereference in __sta2x11_mfd_mask() mfd: wm5102: Add tuning for revision B mfd: arizona: Defer patch initialistation until after first device boot mfd: tps65910: Fix wrong ack_base register mfd: tps65910: Remove unused data mfd: stmpe: Get rid of irq_invert_polarity mfd: ab8500-core: Fix invalid free of devm_ allocated data mfd: wm5102: Mark DSP memory regions as volatile mfd: wm5102: Correct default for LDO1_CONTROL_2 mfd: arizona: Register haptics devices mfd: wm8994: Make current device behaviour the default mfd: tps65090: MFD_TPS65090 needs to select REGMAP_IRQ mfd: Fix stmpe.c build when OF is not enabled mfd: jz4740-adc: Use devm_kzalloc ...
2012-12-17 02:55:20 +00:00
obj-$(CONFIG_VIPERBOARD_ADC) += viperboard_adc.o
iio:adc: Add Xilinx XADC driver The Xilinx XADC is a ADC that can be found in the series 7 FPGAs from Xilinx. The XADC has a DRP interface for communication. Currently two different frontends for the DRP interface exist. One that is only available on the ZYNQ family as a hardmacro in the SoC portion of the ZYNQ. The other one is available on all series 7 platforms and is a softmacro with a AXI interface. This driver supports both interfaces and internally has a small abstraction layer that hides the specifics of these interfaces from the main driver logic. The ADC has a couple of internal channels which are used for voltage and temperature monitoring of the FPGA as well as one primary and up to 16 channels auxiliary channels for measuring external voltages. The external auxiliary channels can either be directly connected each to one physical pin on the FPGA or they can make use of an external multiplexer which is responsible for multiplexing the external signals onto one pair of physical pins. The voltage and temperature monitoring channels also have an event capability which allows to generate a interrupt when their value falls below or raises above a set threshold. Buffered sampling mode is supported by the driver, but only for AXI-XADC since the ZYNQ XADC interface does not have capabilities for supporting buffer mode (no end-of-conversion interrupt). If buffered mode is supported the driver will register two triggers. One "xadc-samplerate" trigger which will generate samples with the configured samplerate. And one "xadc-convst" trigger which will generate one sample each time the CONVST (conversion start) signal is asserted. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2014-02-17 14:10:00 +00:00
xilinx-xadc-y := xilinx-xadc-core.o xilinx-xadc-events.o
obj-$(CONFIG_XILINX_XADC) += xilinx-xadc.o