2008-09-05 10:21:37 +00:00
|
|
|
/*
|
|
|
|
* bf5xx-ac97.c -- AC97 support for the ADI blackfin chip.
|
|
|
|
*
|
|
|
|
* Author: Roy Huang
|
|
|
|
* Created: 11th. June 2007
|
|
|
|
* Copyright: Analog Device Inc.
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify
|
|
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
|
|
* published by the Free Software Foundation.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <linux/init.h>
|
|
|
|
#include <linux/module.h>
|
|
|
|
#include <linux/platform_device.h>
|
|
|
|
#include <linux/interrupt.h>
|
|
|
|
#include <linux/wait.h>
|
|
|
|
#include <linux/delay.h>
|
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 08:04:11 +00:00
|
|
|
#include <linux/slab.h>
|
2008-09-05 10:21:37 +00:00
|
|
|
|
|
|
|
#include <sound/core.h>
|
|
|
|
#include <sound/pcm.h>
|
|
|
|
#include <sound/ac97_codec.h>
|
|
|
|
#include <sound/initval.h>
|
|
|
|
#include <sound/soc.h>
|
|
|
|
|
|
|
|
#include <asm/irq.h>
|
|
|
|
#include <asm/portmux.h>
|
|
|
|
#include <linux/mutex.h>
|
|
|
|
#include <linux/gpio.h>
|
|
|
|
|
|
|
|
#include "bf5xx-sport.h"
|
|
|
|
#include "bf5xx-ac97.h"
|
|
|
|
|
2009-06-02 04:18:57 +00:00
|
|
|
/* Anomaly notes:
|
|
|
|
* 05000250 - AD1980 is running in TDM mode and RFS/TFS are generated by SPORT
|
|
|
|
* contrtoller. But, RFSDIV and TFSDIV are always set to 16*16-1,
|
|
|
|
* while the max AC97 data size is 13*16. The DIV is always larger
|
|
|
|
* than data size. AD73311 and ad2602 are not running in TDM mode.
|
|
|
|
* AD1836 and AD73322 depend on external RFS/TFS only. So, this
|
|
|
|
* anomaly does not affect blackfin sound drivers.
|
|
|
|
*/
|
|
|
|
|
2011-03-28 05:45:10 +00:00
|
|
|
static struct sport_device *ac97_sport_handle;
|
2008-09-05 10:21:37 +00:00
|
|
|
|
2008-11-18 08:18:17 +00:00
|
|
|
void bf5xx_pcm_to_ac97(struct ac97_frame *dst, const __u16 *src,
|
|
|
|
size_t count, unsigned int chan_mask)
|
2008-09-05 10:21:37 +00:00
|
|
|
{
|
|
|
|
while (count--) {
|
2008-11-18 08:18:17 +00:00
|
|
|
dst->ac97_tag = TAG_VALID;
|
|
|
|
if (chan_mask & SP_FL) {
|
|
|
|
dst->ac97_pcm_r = *src++;
|
|
|
|
dst->ac97_tag |= TAG_PCM_RIGHT;
|
|
|
|
}
|
|
|
|
if (chan_mask & SP_FR) {
|
|
|
|
dst->ac97_pcm_l = *src++;
|
|
|
|
dst->ac97_tag |= TAG_PCM_LEFT;
|
|
|
|
|
|
|
|
}
|
|
|
|
#if defined(CONFIG_SND_BF5XX_MULTICHAN_SUPPORT)
|
|
|
|
if (chan_mask & SP_SR) {
|
|
|
|
dst->ac97_sl = *src++;
|
|
|
|
dst->ac97_tag |= TAG_PCM_SL;
|
|
|
|
}
|
|
|
|
if (chan_mask & SP_SL) {
|
|
|
|
dst->ac97_sr = *src++;
|
|
|
|
dst->ac97_tag |= TAG_PCM_SR;
|
|
|
|
}
|
|
|
|
if (chan_mask & SP_LFE) {
|
|
|
|
dst->ac97_lfe = *src++;
|
|
|
|
dst->ac97_tag |= TAG_PCM_LFE;
|
|
|
|
}
|
|
|
|
if (chan_mask & SP_FC) {
|
|
|
|
dst->ac97_center = *src++;
|
|
|
|
dst->ac97_tag |= TAG_PCM_CENTER;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
dst++;
|
2008-09-05 10:21:37 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(bf5xx_pcm_to_ac97);
|
|
|
|
|
2008-11-18 08:18:17 +00:00
|
|
|
void bf5xx_ac97_to_pcm(const struct ac97_frame *src, __u16 *dst,
|
2008-09-05 10:21:37 +00:00
|
|
|
size_t count)
|
|
|
|
{
|
2008-11-18 08:18:17 +00:00
|
|
|
while (count--) {
|
|
|
|
*(dst++) = src->ac97_pcm_l;
|
|
|
|
*(dst++) = src->ac97_pcm_r;
|
|
|
|
src++;
|
|
|
|
}
|
2008-09-05 10:21:37 +00:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(bf5xx_ac97_to_pcm);
|
|
|
|
|
|
|
|
static unsigned int sport_tx_curr_frag(struct sport_device *sport)
|
|
|
|
{
|
2008-11-18 08:18:17 +00:00
|
|
|
return sport->tx_curr_frag = sport_curr_offset_tx(sport) /
|
2008-09-05 10:21:37 +00:00
|
|
|
sport->tx_fragsize;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void enqueue_cmd(struct snd_ac97 *ac97, __u16 addr, __u16 data)
|
|
|
|
{
|
2011-03-28 05:45:10 +00:00
|
|
|
struct sport_device *sport = ac97_sport_handle;
|
|
|
|
int *cmd_count = sport->private_data;
|
2008-09-05 10:21:37 +00:00
|
|
|
int nextfrag = sport_tx_curr_frag(sport);
|
|
|
|
struct ac97_frame *nextwrite;
|
|
|
|
|
|
|
|
sport_incfrag(sport, &nextfrag, 1);
|
|
|
|
|
2008-11-18 08:18:17 +00:00
|
|
|
nextwrite = (struct ac97_frame *)(sport->tx_buf +
|
2008-09-05 10:21:37 +00:00
|
|
|
nextfrag * sport->tx_fragsize);
|
|
|
|
pr_debug("sport->tx_buf:%p, nextfrag:0x%x nextwrite:%p, cmd_count:%d\n",
|
|
|
|
sport->tx_buf, nextfrag, nextwrite, cmd_count[nextfrag]);
|
|
|
|
nextwrite[cmd_count[nextfrag]].ac97_tag |= TAG_CMD;
|
|
|
|
nextwrite[cmd_count[nextfrag]].ac97_addr = addr;
|
|
|
|
nextwrite[cmd_count[nextfrag]].ac97_data = data;
|
|
|
|
++cmd_count[nextfrag];
|
|
|
|
pr_debug("ac97_sport: Inserting %02x/%04x into fragment %d\n",
|
|
|
|
addr >> 8, data, nextfrag);
|
|
|
|
}
|
|
|
|
|
|
|
|
static unsigned short bf5xx_ac97_read(struct snd_ac97 *ac97,
|
|
|
|
unsigned short reg)
|
|
|
|
{
|
2011-03-28 05:45:10 +00:00
|
|
|
struct sport_device *sport_handle = ac97_sport_handle;
|
2008-09-05 10:21:37 +00:00
|
|
|
struct ac97_frame out_frame[2], in_frame[2];
|
|
|
|
|
|
|
|
pr_debug("%s enter 0x%x\n", __func__, reg);
|
|
|
|
|
|
|
|
/* When dma descriptor is enabled, the register should not be read */
|
|
|
|
if (sport_handle->tx_run || sport_handle->rx_run) {
|
|
|
|
pr_err("Could you send a mail to cliff.cai@analog.com "
|
|
|
|
"to report this?\n");
|
|
|
|
return -EFAULT;
|
|
|
|
}
|
|
|
|
|
|
|
|
memset(&out_frame, 0, 2 * sizeof(struct ac97_frame));
|
|
|
|
memset(&in_frame, 0, 2 * sizeof(struct ac97_frame));
|
|
|
|
out_frame[0].ac97_tag = TAG_VALID | TAG_CMD;
|
|
|
|
out_frame[0].ac97_addr = ((reg << 8) | 0x8000);
|
|
|
|
sport_send_and_recv(sport_handle, (unsigned char *)&out_frame,
|
|
|
|
(unsigned char *)&in_frame,
|
|
|
|
2 * sizeof(struct ac97_frame));
|
|
|
|
return in_frame[1].ac97_data;
|
|
|
|
}
|
|
|
|
|
|
|
|
void bf5xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
|
|
|
|
unsigned short val)
|
|
|
|
{
|
2011-03-28 05:45:10 +00:00
|
|
|
struct sport_device *sport_handle = ac97_sport_handle;
|
|
|
|
|
2008-09-05 10:21:37 +00:00
|
|
|
pr_debug("%s enter 0x%x:0x%04x\n", __func__, reg, val);
|
|
|
|
|
|
|
|
if (sport_handle->tx_run) {
|
|
|
|
enqueue_cmd(ac97, (reg << 8), val); /* write */
|
|
|
|
enqueue_cmd(ac97, (reg << 8) | 0x8000, 0); /* read back */
|
|
|
|
} else {
|
|
|
|
struct ac97_frame frame;
|
|
|
|
memset(&frame, 0, sizeof(struct ac97_frame));
|
|
|
|
frame.ac97_tag = TAG_VALID | TAG_CMD;
|
|
|
|
frame.ac97_addr = (reg << 8);
|
|
|
|
frame.ac97_data = val;
|
|
|
|
sport_send_and_recv(sport_handle, (unsigned char *)&frame, \
|
|
|
|
NULL, sizeof(struct ac97_frame));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void bf5xx_ac97_warm_reset(struct snd_ac97 *ac97)
|
|
|
|
{
|
2011-03-28 05:45:10 +00:00
|
|
|
struct sport_device *sport_handle = ac97_sport_handle;
|
|
|
|
u16 gpio = P_IDENT(sport_handle->pin_req[3]);
|
2008-09-05 10:21:37 +00:00
|
|
|
|
|
|
|
pr_debug("%s enter\n", __func__);
|
|
|
|
|
2011-03-28 05:45:10 +00:00
|
|
|
peripheral_free_list(sport_handle->pin_req);
|
2008-09-05 10:21:37 +00:00
|
|
|
gpio_request(gpio, "bf5xx-ac97");
|
|
|
|
gpio_direction_output(gpio, 1);
|
|
|
|
udelay(2);
|
|
|
|
gpio_set_value(gpio, 0);
|
|
|
|
udelay(1);
|
|
|
|
gpio_free(gpio);
|
2011-03-28 05:45:10 +00:00
|
|
|
peripheral_request_list(sport_handle->pin_req, "soc-audio");
|
2008-09-05 10:21:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void bf5xx_ac97_cold_reset(struct snd_ac97 *ac97)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
|
|
|
|
pr_debug("%s enter\n", __func__);
|
|
|
|
|
|
|
|
/* It is specified for bf548-ezkit */
|
|
|
|
gpio_set_value(CONFIG_SND_BF5XX_RESET_GPIO_NUM, 0);
|
|
|
|
/* Keep reset pin low for 1 ms */
|
|
|
|
mdelay(1);
|
|
|
|
gpio_set_value(CONFIG_SND_BF5XX_RESET_GPIO_NUM, 1);
|
|
|
|
/* Wait for bit clock recover */
|
|
|
|
mdelay(1);
|
|
|
|
#else
|
|
|
|
pr_info("%s: Not implemented\n", __func__);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
struct snd_ac97_bus_ops soc_ac97_ops = {
|
|
|
|
.read = bf5xx_ac97_read,
|
|
|
|
.write = bf5xx_ac97_write,
|
|
|
|
.warm_reset = bf5xx_ac97_warm_reset,
|
|
|
|
.reset = bf5xx_ac97_cold_reset,
|
|
|
|
};
|
|
|
|
EXPORT_SYMBOL_GPL(soc_ac97_ops);
|
|
|
|
|
|
|
|
#ifdef CONFIG_PM
|
2008-12-03 18:21:52 +00:00
|
|
|
static int bf5xx_ac97_suspend(struct snd_soc_dai *dai)
|
2008-09-05 10:21:37 +00:00
|
|
|
{
|
2010-03-17 20:15:21 +00:00
|
|
|
struct sport_device *sport = snd_soc_dai_get_drvdata(dai);
|
2008-09-05 10:21:37 +00:00
|
|
|
|
|
|
|
pr_debug("%s : sport %d\n", __func__, dai->id);
|
|
|
|
if (!dai->active)
|
|
|
|
return 0;
|
2011-01-12 00:57:33 +00:00
|
|
|
if (dai->capture_active)
|
2008-09-05 10:21:37 +00:00
|
|
|
sport_rx_stop(sport);
|
2011-01-12 00:57:33 +00:00
|
|
|
if (dai->playback_active)
|
2008-09-05 10:21:37 +00:00
|
|
|
sport_tx_stop(sport);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-12-03 18:21:52 +00:00
|
|
|
static int bf5xx_ac97_resume(struct snd_soc_dai *dai)
|
2008-09-05 10:21:37 +00:00
|
|
|
{
|
|
|
|
int ret;
|
2010-03-17 20:15:21 +00:00
|
|
|
struct sport_device *sport = snd_soc_dai_get_drvdata(dai);
|
2008-09-05 10:21:37 +00:00
|
|
|
|
|
|
|
pr_debug("%s : sport %d\n", __func__, dai->id);
|
|
|
|
if (!dai->active)
|
|
|
|
return 0;
|
|
|
|
|
2009-09-17 00:25:08 +00:00
|
|
|
#if defined(CONFIG_SND_BF5XX_MULTICHAN_SUPPORT)
|
|
|
|
ret = sport_set_multichannel(sport, 16, 0x3FF, 1);
|
|
|
|
#else
|
2009-07-14 14:01:39 +00:00
|
|
|
ret = sport_set_multichannel(sport, 16, 0x1F, 1);
|
2009-09-17 00:25:08 +00:00
|
|
|
#endif
|
2008-09-05 10:21:37 +00:00
|
|
|
if (ret) {
|
|
|
|
pr_err("SPORT is busy!\n");
|
|
|
|
return -EBUSY;
|
|
|
|
}
|
|
|
|
|
2009-07-14 14:01:39 +00:00
|
|
|
ret = sport_config_rx(sport, IRFS, 0xF, 0, (16*16-1));
|
2008-09-05 10:21:37 +00:00
|
|
|
if (ret) {
|
|
|
|
pr_err("SPORT is busy!\n");
|
|
|
|
return -EBUSY;
|
|
|
|
}
|
|
|
|
|
2009-07-14 14:01:39 +00:00
|
|
|
ret = sport_config_tx(sport, ITFS, 0xF, 0, (16*16-1));
|
2008-09-05 10:21:37 +00:00
|
|
|
if (ret) {
|
|
|
|
pr_err("SPORT is busy!\n");
|
|
|
|
return -EBUSY;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#else
|
|
|
|
#define bf5xx_ac97_suspend NULL
|
|
|
|
#define bf5xx_ac97_resume NULL
|
|
|
|
#endif
|
|
|
|
|
2011-03-28 05:45:10 +00:00
|
|
|
static struct snd_soc_dai_driver bfin_ac97_dai = {
|
|
|
|
.ac97_control = 1,
|
|
|
|
.suspend = bf5xx_ac97_suspend,
|
|
|
|
.resume = bf5xx_ac97_resume,
|
|
|
|
.playback = {
|
|
|
|
.stream_name = "AC97 Playback",
|
|
|
|
.channels_min = 2,
|
|
|
|
#if defined(CONFIG_SND_BF5XX_MULTICHAN_SUPPORT)
|
|
|
|
.channels_max = 6,
|
|
|
|
#else
|
|
|
|
.channels_max = 2,
|
|
|
|
#endif
|
|
|
|
.rates = SNDRV_PCM_RATE_48000,
|
|
|
|
.formats = SNDRV_PCM_FMTBIT_S16_LE, },
|
|
|
|
.capture = {
|
|
|
|
.stream_name = "AC97 Capture",
|
|
|
|
.channels_min = 2,
|
|
|
|
.channels_max = 2,
|
|
|
|
.rates = SNDRV_PCM_RATE_48000,
|
|
|
|
.formats = SNDRV_PCM_FMTBIT_S16_LE, },
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __devinit asoc_bfin_ac97_probe(struct platform_device *pdev)
|
2008-09-05 10:21:37 +00:00
|
|
|
{
|
2011-03-28 05:45:10 +00:00
|
|
|
struct sport_device *sport_handle;
|
|
|
|
int ret;
|
2008-09-05 10:21:37 +00:00
|
|
|
|
|
|
|
#ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
|
|
|
|
/* Request PB3 as reset pin */
|
|
|
|
if (gpio_request(CONFIG_SND_BF5XX_RESET_GPIO_NUM, "SND_AD198x RESET")) {
|
|
|
|
pr_err("Failed to request GPIO_%d for reset\n",
|
|
|
|
CONFIG_SND_BF5XX_RESET_GPIO_NUM);
|
2008-11-18 08:18:17 +00:00
|
|
|
ret = -1;
|
|
|
|
goto gpio_err;
|
2008-09-05 10:21:37 +00:00
|
|
|
}
|
|
|
|
gpio_direction_output(CONFIG_SND_BF5XX_RESET_GPIO_NUM, 1);
|
|
|
|
#endif
|
2011-03-28 05:45:10 +00:00
|
|
|
|
|
|
|
sport_handle = sport_init(pdev, 2, sizeof(struct ac97_frame),
|
|
|
|
PAGE_SIZE);
|
2008-09-05 10:21:37 +00:00
|
|
|
if (!sport_handle) {
|
2008-11-18 08:18:17 +00:00
|
|
|
ret = -ENODEV;
|
|
|
|
goto sport_err;
|
2008-09-05 10:21:37 +00:00
|
|
|
}
|
2011-03-28 05:45:10 +00:00
|
|
|
|
2008-09-05 10:21:37 +00:00
|
|
|
/*SPORT works in TDM mode to simulate AC97 transfers*/
|
2009-09-17 00:25:08 +00:00
|
|
|
#if defined(CONFIG_SND_BF5XX_MULTICHAN_SUPPORT)
|
|
|
|
ret = sport_set_multichannel(sport_handle, 16, 0x3FF, 1);
|
|
|
|
#else
|
2008-09-05 10:21:37 +00:00
|
|
|
ret = sport_set_multichannel(sport_handle, 16, 0x1F, 1);
|
2009-09-17 00:25:08 +00:00
|
|
|
#endif
|
2008-09-05 10:21:37 +00:00
|
|
|
if (ret) {
|
|
|
|
pr_err("SPORT is busy!\n");
|
2008-11-18 08:18:17 +00:00
|
|
|
ret = -EBUSY;
|
|
|
|
goto sport_config_err;
|
2008-09-05 10:21:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
ret = sport_config_rx(sport_handle, IRFS, 0xF, 0, (16*16-1));
|
|
|
|
if (ret) {
|
|
|
|
pr_err("SPORT is busy!\n");
|
2008-11-18 08:18:17 +00:00
|
|
|
ret = -EBUSY;
|
|
|
|
goto sport_config_err;
|
2008-09-05 10:21:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
ret = sport_config_tx(sport_handle, ITFS, 0xF, 0, (16*16-1));
|
|
|
|
if (ret) {
|
|
|
|
pr_err("SPORT is busy!\n");
|
2008-11-18 08:18:17 +00:00
|
|
|
ret = -EBUSY;
|
|
|
|
goto sport_config_err;
|
|
|
|
}
|
|
|
|
|
2011-03-28 05:45:10 +00:00
|
|
|
ret = snd_soc_register_dai(&pdev->dev, &bfin_ac97_dai);
|
|
|
|
if (ret) {
|
|
|
|
pr_err("Failed to register DAI: %d\n", ret);
|
|
|
|
goto sport_config_err;
|
|
|
|
}
|
|
|
|
|
|
|
|
ac97_sport_handle = sport_handle;
|
|
|
|
|
2008-11-18 08:18:19 +00:00
|
|
|
return 0;
|
|
|
|
|
2008-11-18 08:18:17 +00:00
|
|
|
sport_config_err:
|
2011-03-28 05:45:10 +00:00
|
|
|
sport_done(sport_handle);
|
2008-11-18 08:18:17 +00:00
|
|
|
sport_err:
|
2008-09-05 10:21:37 +00:00
|
|
|
#ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
|
2008-11-18 08:18:17 +00:00
|
|
|
gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
|
|
|
|
gpio_err:
|
2009-03-06 07:53:28 +00:00
|
|
|
#endif
|
2008-11-18 08:18:17 +00:00
|
|
|
|
|
|
|
return ret;
|
2008-09-05 10:21:37 +00:00
|
|
|
}
|
|
|
|
|
2011-03-28 05:45:10 +00:00
|
|
|
static int __devexit asoc_bfin_ac97_remove(struct platform_device *pdev)
|
2008-09-05 10:21:37 +00:00
|
|
|
{
|
2011-03-28 05:45:10 +00:00
|
|
|
struct sport_device *sport_handle = platform_get_drvdata(pdev);
|
|
|
|
|
|
|
|
snd_soc_unregister_dai(&pdev->dev);
|
|
|
|
sport_done(sport_handle);
|
2008-09-05 10:21:37 +00:00
|
|
|
#ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
|
|
|
|
gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
|
|
|
|
#endif
|
2010-03-17 20:15:21 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct platform_driver asoc_bfin_ac97_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "bfin-ac97",
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
},
|
|
|
|
|
|
|
|
.probe = asoc_bfin_ac97_probe,
|
|
|
|
.remove = __devexit_p(asoc_bfin_ac97_remove),
|
|
|
|
};
|
|
|
|
|
2011-11-24 06:44:52 +00:00
|
|
|
module_platform_driver(asoc_bfin_ac97_driver);
|
2010-03-17 20:15:21 +00:00
|
|
|
|
2008-09-05 10:21:37 +00:00
|
|
|
MODULE_AUTHOR("Roy Huang");
|
|
|
|
MODULE_DESCRIPTION("AC97 driver for ADI Blackfin");
|
|
|
|
MODULE_LICENSE("GPL");
|