2023-10-26 10:33:13 +00:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2023 Analog Devices, Inc.
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* Author: Antoniu Miclaus <antoniu.miclaus@analog.com>
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*/
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#include <linux/bitops.h>
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#include <linux/err.h>
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#include <linux/hwmon.h>
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#include <linux/i2c.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/property.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#define LTC2991_STATUS_LOW 0x00
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#define LTC2991_CH_EN_TRIGGER 0x01
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#define LTC2991_V1_V4_CTRL 0x06
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#define LTC2991_V5_V8_CTRL 0x07
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#define LTC2991_PWM_TH_LSB_T_INT 0x08
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#define LTC2991_PWM_TH_MSB 0x09
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#define LTC2991_CHANNEL_V_MSB(x) (0x0A + ((x) * 2))
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#define LTC2991_CHANNEL_T_MSB(x) (0x0A + ((x) * 4))
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#define LTC2991_CHANNEL_C_MSB(x) (0x0C + ((x) * 4))
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#define LTC2991_T_INT_MSB 0x1A
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#define LTC2991_VCC_MSB 0x1C
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#define LTC2991_V7_V8_EN BIT(7)
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#define LTC2991_V5_V6_EN BIT(6)
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#define LTC2991_V3_V4_EN BIT(5)
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#define LTC2991_V1_V2_EN BIT(4)
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#define LTC2991_T_INT_VCC_EN BIT(3)
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#define LTC2991_V3_V4_FILT_EN BIT(7)
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#define LTC2991_V3_V4_TEMP_EN BIT(5)
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#define LTC2991_V3_V4_DIFF_EN BIT(4)
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#define LTC2991_V1_V2_FILT_EN BIT(3)
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#define LTC2991_V1_V2_TEMP_EN BIT(1)
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#define LTC2991_V1_V2_DIFF_EN BIT(0)
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#define LTC2991_V7_V8_FILT_EN BIT(7)
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#define LTC2991_V7_V8_TEMP_EN BIT(5)
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#define LTC2991_V7_V8_DIFF_EN BIT(4)
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#define LTC2991_V5_V6_FILT_EN BIT(7)
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#define LTC2991_V5_V6_TEMP_EN BIT(5)
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#define LTC2991_V5_V6_DIFF_EN BIT(4)
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#define LTC2991_REPEAT_ACQ_EN BIT(4)
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#define LTC2991_T_INT_FILT_EN BIT(3)
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#define LTC2991_MAX_CHANNEL 4
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#define LTC2991_T_INT_CH_NR 4
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#define LTC2991_VCC_CH_NR 0
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struct ltc2991_state {
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struct regmap *regmap;
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u32 r_sense_uohm[LTC2991_MAX_CHANNEL];
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bool temp_en[LTC2991_MAX_CHANNEL];
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};
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static int ltc2991_read_reg(struct ltc2991_state *st, u8 addr, u8 reg_len,
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int *val)
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{
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__be16 regvals;
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int ret;
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if (reg_len < 2)
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return regmap_read(st->regmap, addr, val);
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ret = regmap_bulk_read(st->regmap, addr, ®vals, reg_len);
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if (ret)
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return ret;
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*val = be16_to_cpu(regvals);
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return 0;
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}
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static int ltc2991_get_voltage(struct ltc2991_state *st, u32 reg, long *val)
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{
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int reg_val, ret, offset = 0;
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ret = ltc2991_read_reg(st, reg, 2, ®_val);
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if (ret)
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return ret;
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if (reg == LTC2991_VCC_MSB)
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/* Vcc 2.5V offset */
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offset = 2500;
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/* Vx, 305.18uV/LSB */
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*val = DIV_ROUND_CLOSEST(sign_extend32(reg_val, 14) * 30518,
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1000 * 100) + offset;
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return 0;
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}
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static int ltc2991_read_in(struct device *dev, u32 attr, int channel, long *val)
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{
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struct ltc2991_state *st = dev_get_drvdata(dev);
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u32 reg;
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switch (attr) {
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case hwmon_in_input:
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if (channel == LTC2991_VCC_CH_NR)
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reg = LTC2991_VCC_MSB;
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else
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reg = LTC2991_CHANNEL_V_MSB(channel - 1);
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return ltc2991_get_voltage(st, reg, val);
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default:
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return -EOPNOTSUPP;
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}
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}
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static int ltc2991_get_curr(struct ltc2991_state *st, u32 reg, int channel,
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long *val)
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{
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int reg_val, ret;
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ret = ltc2991_read_reg(st, reg, 2, ®_val);
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if (ret)
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return ret;
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/* Vx-Vy, 19.075uV/LSB */
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*val = DIV_ROUND_CLOSEST(sign_extend32(reg_val, 14) * 19075,
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st->r_sense_uohm[channel]);
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return 0;
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}
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static int ltc2991_read_curr(struct device *dev, u32 attr, int channel,
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long *val)
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{
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struct ltc2991_state *st = dev_get_drvdata(dev);
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u32 reg;
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switch (attr) {
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case hwmon_curr_input:
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reg = LTC2991_CHANNEL_C_MSB(channel);
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return ltc2991_get_curr(st, reg, channel, val);
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default:
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return -EOPNOTSUPP;
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}
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}
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static int ltc2991_get_temp(struct ltc2991_state *st, u32 reg, int channel,
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long *val)
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{
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int reg_val, ret;
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ret = ltc2991_read_reg(st, reg, 2, ®_val);
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if (ret)
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return ret;
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/* Temp LSB = 0.0625 Degrees */
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*val = DIV_ROUND_CLOSEST(sign_extend32(reg_val, 12) * 1000, 16);
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return 0;
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}
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static int ltc2991_read_temp(struct device *dev, u32 attr, int channel,
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long *val)
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{
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struct ltc2991_state *st = dev_get_drvdata(dev);
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u32 reg;
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switch (attr) {
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case hwmon_temp_input:
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if (channel == LTC2991_T_INT_CH_NR)
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reg = LTC2991_T_INT_MSB;
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else
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reg = LTC2991_CHANNEL_T_MSB(channel);
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return ltc2991_get_temp(st, reg, channel, val);
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default:
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return -EOPNOTSUPP;
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}
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}
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static int ltc2991_read(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long *val)
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{
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switch (type) {
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case hwmon_in:
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return ltc2991_read_in(dev, attr, channel, val);
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case hwmon_curr:
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return ltc2991_read_curr(dev, attr, channel, val);
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case hwmon_temp:
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return ltc2991_read_temp(dev, attr, channel, val);
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default:
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return -EOPNOTSUPP;
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}
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}
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static umode_t ltc2991_is_visible(const void *data,
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enum hwmon_sensor_types type, u32 attr,
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int channel)
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{
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const struct ltc2991_state *st = data;
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switch (type) {
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case hwmon_in:
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switch (attr) {
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case hwmon_in_input:
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if (channel == LTC2991_VCC_CH_NR)
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return 0444;
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if (st->temp_en[(channel - 1) / 2])
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break;
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if (channel % 2)
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return 0444;
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if (!st->r_sense_uohm[(channel - 1) / 2])
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return 0444;
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}
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break;
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case hwmon_curr:
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switch (attr) {
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case hwmon_curr_input:
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if (st->r_sense_uohm[channel])
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return 0444;
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break;
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}
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break;
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case hwmon_temp:
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switch (attr) {
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case hwmon_temp_input:
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if (st->temp_en[channel] ||
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channel == LTC2991_T_INT_CH_NR)
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return 0444;
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break;
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}
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break;
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default:
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break;
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}
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return 0;
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}
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static const struct hwmon_ops ltc2991_hwmon_ops = {
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.is_visible = ltc2991_is_visible,
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.read = ltc2991_read,
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};
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static const struct hwmon_channel_info *ltc2991_info[] = {
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HWMON_CHANNEL_INFO(temp,
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HWMON_T_INPUT,
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HWMON_T_INPUT,
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HWMON_T_INPUT,
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HWMON_T_INPUT,
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HWMON_T_INPUT
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),
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HWMON_CHANNEL_INFO(curr,
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HWMON_C_INPUT,
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HWMON_C_INPUT,
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HWMON_C_INPUT,
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HWMON_C_INPUT
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),
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HWMON_CHANNEL_INFO(in,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT,
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HWMON_I_INPUT
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),
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NULL
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};
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static const struct hwmon_chip_info ltc2991_chip_info = {
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.ops = <c2991_hwmon_ops,
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.info = ltc2991_info,
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};
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static const struct regmap_config ltc2991_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = 0x1D,
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};
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2023-10-31 09:56:46 +00:00
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static int ltc2991_init(struct ltc2991_state *st, struct device *dev)
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2023-10-26 10:33:13 +00:00
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{
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struct fwnode_handle *child;
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int ret;
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u32 val, addr;
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u8 v5_v8_reg_data = 0, v1_v4_reg_data = 0;
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2023-10-31 09:56:46 +00:00
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ret = devm_regulator_get_enable(dev, "vcc");
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2023-10-26 10:33:13 +00:00
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if (ret)
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2023-10-31 09:56:46 +00:00
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return dev_err_probe(dev, ret,
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2023-10-26 10:33:13 +00:00
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"failed to enable regulator\n");
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2023-10-31 09:56:46 +00:00
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device_for_each_child_node(dev, child) {
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2023-10-26 10:33:13 +00:00
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ret = fwnode_property_read_u32(child, "reg", &addr);
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if (ret < 0) {
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fwnode_handle_put(child);
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return ret;
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}
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if (addr > 3) {
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fwnode_handle_put(child);
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return -EINVAL;
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}
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ret = fwnode_property_read_u32(child,
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"shunt-resistor-micro-ohms",
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&val);
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if (!ret) {
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if (!val)
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2023-10-31 09:56:46 +00:00
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return dev_err_probe(dev, -EINVAL,
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2023-10-26 10:33:13 +00:00
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"shunt resistor value cannot be zero\n");
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st->r_sense_uohm[addr] = val;
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switch (addr) {
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case 0:
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v1_v4_reg_data |= LTC2991_V1_V2_DIFF_EN;
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break;
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case 1:
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v1_v4_reg_data |= LTC2991_V3_V4_DIFF_EN;
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break;
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case 2:
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v5_v8_reg_data |= LTC2991_V5_V6_DIFF_EN;
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break;
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case 3:
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v5_v8_reg_data |= LTC2991_V7_V8_DIFF_EN;
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break;
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default:
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break;
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}
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}
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ret = fwnode_property_read_bool(child,
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"adi,temperature-enable");
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if (ret) {
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st->temp_en[addr] = ret;
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switch (addr) {
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case 0:
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v1_v4_reg_data |= LTC2991_V1_V2_TEMP_EN;
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break;
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case 1:
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v1_v4_reg_data |= LTC2991_V3_V4_TEMP_EN;
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break;
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case 2:
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v5_v8_reg_data |= LTC2991_V5_V6_TEMP_EN;
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break;
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case 3:
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v5_v8_reg_data |= LTC2991_V7_V8_TEMP_EN;
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break;
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default:
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break;
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}
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}
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}
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ret = regmap_write(st->regmap, LTC2991_V5_V8_CTRL, v5_v8_reg_data);
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if (ret)
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2023-10-31 09:56:46 +00:00
|
|
|
return dev_err_probe(dev, ret,
|
2023-10-26 10:33:13 +00:00
|
|
|
"Error: Failed to set V5-V8 CTRL reg.\n");
|
|
|
|
|
|
|
|
ret = regmap_write(st->regmap, LTC2991_V1_V4_CTRL, v1_v4_reg_data);
|
|
|
|
if (ret)
|
2023-10-31 09:56:46 +00:00
|
|
|
return dev_err_probe(dev, ret,
|
2023-10-26 10:33:13 +00:00
|
|
|
"Error: Failed to set V1-V4 CTRL reg.\n");
|
|
|
|
|
|
|
|
ret = regmap_write(st->regmap, LTC2991_PWM_TH_LSB_T_INT,
|
|
|
|
LTC2991_REPEAT_ACQ_EN);
|
|
|
|
if (ret)
|
2023-10-31 09:56:46 +00:00
|
|
|
return dev_err_probe(dev, ret,
|
2023-10-31 08:42:40 +00:00
|
|
|
"Error: Failed to set continuous mode.\n");
|
2023-10-26 10:33:13 +00:00
|
|
|
|
|
|
|
/* Enable all channels and trigger conversions */
|
|
|
|
return regmap_write(st->regmap, LTC2991_CH_EN_TRIGGER,
|
|
|
|
LTC2991_V7_V8_EN | LTC2991_V5_V6_EN |
|
|
|
|
LTC2991_V3_V4_EN | LTC2991_V1_V2_EN |
|
|
|
|
LTC2991_T_INT_VCC_EN);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ltc2991_i2c_probe(struct i2c_client *client)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
struct device *hwmon_dev;
|
|
|
|
struct ltc2991_state *st;
|
|
|
|
|
|
|
|
st = devm_kzalloc(&client->dev, sizeof(*st), GFP_KERNEL);
|
|
|
|
if (!st)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
st->regmap = devm_regmap_init_i2c(client, <c2991_regmap_config);
|
|
|
|
if (IS_ERR(st->regmap))
|
|
|
|
return PTR_ERR(st->regmap);
|
|
|
|
|
2023-10-31 09:56:46 +00:00
|
|
|
ret = ltc2991_init(st, &client->dev);
|
2023-10-26 10:33:13 +00:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
hwmon_dev = devm_hwmon_device_register_with_info(&client->dev,
|
|
|
|
client->name, st,
|
|
|
|
<c2991_chip_info,
|
|
|
|
NULL);
|
|
|
|
|
|
|
|
return PTR_ERR_OR_ZERO(hwmon_dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct of_device_id ltc2991_of_match[] = {
|
|
|
|
{ .compatible = "adi,ltc2991" },
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, ltc2991_of_match);
|
|
|
|
|
|
|
|
static const struct i2c_device_id ltc2991_i2c_id[] = {
|
|
|
|
{ "ltc2991", 0 },
|
|
|
|
{}
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(i2c, ltc2991_i2c_id);
|
|
|
|
|
|
|
|
static struct i2c_driver ltc2991_i2c_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "ltc2991",
|
|
|
|
.of_match_table = ltc2991_of_match,
|
|
|
|
},
|
|
|
|
.probe = ltc2991_i2c_probe,
|
|
|
|
.id_table = ltc2991_i2c_id,
|
|
|
|
};
|
|
|
|
|
|
|
|
module_i2c_driver(ltc2991_i2c_driver);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Antoniu Miclaus <antoniu.miclaus@analog.com>");
|
|
|
|
MODULE_DESCRIPTION("Analog Devices LTC2991 HWMON Driver");
|
|
|
|
MODULE_LICENSE("GPL");
|