2019-05-19 12:07:45 +00:00
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# SPDX-License-Identifier: GPL-2.0-only
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2012-11-26 09:16:10 +00:00
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2019-04-28 17:37:23 +00:00
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menuconfig NET_DSA
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2015-03-21 01:31:03 +00:00
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tristate "Distributed Switch Architecture"
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2017-11-11 15:29:41 +00:00
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depends on BRIDGE || BRIDGE=n
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2021-02-20 05:12:21 +00:00
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depends on HSR || HSR=n
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2021-03-19 15:46:30 +00:00
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depends on INET && NETDEVICES
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2020-04-21 13:41:08 +00:00
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select GRO_CELLS
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2017-01-09 21:49:26 +00:00
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select NET_SWITCHDEV
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2018-05-10 20:17:32 +00:00
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select PHYLINK
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2019-03-24 10:14:38 +00:00
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select NET_DEVLINK
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2021-04-28 13:09:46 +00:00
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imply NET_SELFTESTS
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2020-06-13 16:50:22 +00:00
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help
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2015-03-21 01:31:03 +00:00
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Say Y if you want to enable support for the hardware switches supported
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by the Distributed Switch Architecture.
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net: Distributed Switch Architecture protocol support
Distributed Switch Architecture is a protocol for managing hardware
switch chips. It consists of a set of MII management registers and
commands to configure the switch, and an ethernet header format to
signal which of the ports of the switch a packet was received from
or is intended to be sent to.
The switches that this driver supports are typically embedded in
access points and routers, and a typical setup with a DSA switch
looks something like this:
+-----------+ +-----------+
| | RGMII | |
| +-------+ +------ 1000baseT MDI ("WAN")
| | | 6-port +------ 1000baseT MDI ("LAN1")
| CPU | | ethernet +------ 1000baseT MDI ("LAN2")
| |MIImgmt| switch +------ 1000baseT MDI ("LAN3")
| +-------+ w/5 PHYs +------ 1000baseT MDI ("LAN4")
| | | |
+-----------+ +-----------+
The switch driver presents each port on the switch as a separate
network interface to Linux, polls the switch to maintain software
link state of those ports, forwards MII management interface
accesses to those network interfaces (e.g. as done by ethtool) to
the switch, and exposes the switch's hardware statistics counters
via the appropriate Linux kernel interfaces.
This initial patch supports the MII management interface register
layout of the Marvell 88E6123, 88E6161 and 88E6165 switch chips, and
supports the "Ethertype DSA" packet tagging format.
(There is no officially registered ethertype for the Ethertype DSA
packet format, so we just grab a random one. The ethertype to use
is programmed into the switch, and the switch driver uses the value
of ETH_P_EDSA for this, so this define can be changed at any time in
the future if the one we chose is allocated to another protocol or
if Ethertype DSA gets its own officially registered ethertype, and
everything will continue to work.)
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Tested-by: Nicolas Pitre <nico@marvell.com>
Tested-by: Byron Bradley <byron.bbradley@gmail.com>
Tested-by: Tim Ellis <tim.ellis@mac.com>
Tested-by: Peter van Valderen <linux@ddcrew.com>
Tested-by: Dirk Teurlings <dirk@upexia.nl>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-07 13:44:02 +00:00
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2012-11-26 09:16:10 +00:00
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if NET_DSA
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net: Distributed Switch Architecture protocol support
Distributed Switch Architecture is a protocol for managing hardware
switch chips. It consists of a set of MII management registers and
commands to configure the switch, and an ethernet header format to
signal which of the ports of the switch a packet was received from
or is intended to be sent to.
The switches that this driver supports are typically embedded in
access points and routers, and a typical setup with a DSA switch
looks something like this:
+-----------+ +-----------+
| | RGMII | |
| +-------+ +------ 1000baseT MDI ("WAN")
| | | 6-port +------ 1000baseT MDI ("LAN1")
| CPU | | ethernet +------ 1000baseT MDI ("LAN2")
| |MIImgmt| switch +------ 1000baseT MDI ("LAN3")
| +-------+ w/5 PHYs +------ 1000baseT MDI ("LAN4")
| | | |
+-----------+ +-----------+
The switch driver presents each port on the switch as a separate
network interface to Linux, polls the switch to maintain software
link state of those ports, forwards MII management interface
accesses to those network interfaces (e.g. as done by ethtool) to
the switch, and exposes the switch's hardware statistics counters
via the appropriate Linux kernel interfaces.
This initial patch supports the MII management interface register
layout of the Marvell 88E6123, 88E6161 and 88E6165 switch chips, and
supports the "Ethertype DSA" packet tagging format.
(There is no officially registered ethertype for the Ethertype DSA
packet format, so we just grab a random one. The ethertype to use
is programmed into the switch, and the switch driver uses the value
of ETH_P_EDSA for this, so this define can be changed at any time in
the future if the one we chose is allocated to another protocol or
if Ethertype DSA gets its own officially registered ethertype, and
everything will continue to work.)
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Tested-by: Nicolas Pitre <nico@marvell.com>
Tested-by: Byron Bradley <byron.bbradley@gmail.com>
Tested-by: Tim Ellis <tim.ellis@mac.com>
Tested-by: Peter van Valderen <linux@ddcrew.com>
Tested-by: Dirk Teurlings <dirk@upexia.nl>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-07 13:44:02 +00:00
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2021-03-19 15:46:30 +00:00
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# Drivers must select the appropriate tagging format(s)
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2019-12-18 08:02:14 +00:00
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config NET_DSA_TAG_AR9331
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tristate "Tag driver for Atheros AR9331 SoC with built-in switch"
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help
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Say Y or M if you want to enable support for tagging frames for
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the Atheros AR9331 SoC with built-in switch.
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2019-04-28 17:37:23 +00:00
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config NET_DSA_TAG_BRCM_COMMON
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tristate
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default n
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2014-08-28 00:04:55 +00:00
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config NET_DSA_TAG_BRCM
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2019-04-28 17:37:23 +00:00
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tristate "Tag driver for Broadcom switches using in-frame headers"
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select NET_DSA_TAG_BRCM_COMMON
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help
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Say Y if you want to enable support for tagging frames for the
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Broadcom switches which place the tag after the MAC source address.
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2021-03-17 10:29:26 +00:00
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config NET_DSA_TAG_BRCM_LEGACY
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tristate "Tag driver for Broadcom legacy switches using in-frame headers"
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select NET_DSA_TAG_BRCM_COMMON
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help
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Say Y if you want to enable support for tagging frames for the
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Broadcom legacy switches which place the tag after the MAC source
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address.
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2014-08-28 00:04:55 +00:00
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2017-11-10 23:22:54 +00:00
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config NET_DSA_TAG_BRCM_PREPEND
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2019-04-28 17:37:23 +00:00
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tristate "Tag driver for Broadcom switches using prepended headers"
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select NET_DSA_TAG_BRCM_COMMON
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help
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Say Y if you want to enable support for tagging frames for the
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Broadcom switches which places the tag before the Ethernet header
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(prepended).
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2020-11-03 07:10:54 +00:00
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config NET_DSA_TAG_HELLCREEK
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tristate "Tag driver for Hirschmann Hellcreek TSN switches"
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help
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Say Y or M if you want to enable support for tagging frames
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for the Hirschmann Hellcreek TSN switches.
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2019-04-28 17:37:23 +00:00
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config NET_DSA_TAG_GSWIP
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tristate "Tag driver for Lantiq / Intel GSWIP switches"
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help
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Say Y or M if you want to enable support for tagging frames for the
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Lantiq / Intel GSWIP switches.
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2017-11-10 23:22:54 +00:00
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2020-11-14 23:45:57 +00:00
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config NET_DSA_TAG_DSA_COMMON
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tristate
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2008-10-07 13:45:02 +00:00
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config NET_DSA_TAG_DSA
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2019-04-28 17:37:23 +00:00
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tristate "Tag driver for Marvell switches using DSA headers"
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2020-11-14 23:45:57 +00:00
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select NET_DSA_TAG_DSA_COMMON
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2019-04-28 17:37:23 +00:00
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help
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Say Y or M if you want to enable support for tagging frames for the
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Marvell switches which use DSA headers.
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2008-10-07 13:45:02 +00:00
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net: Distributed Switch Architecture protocol support
Distributed Switch Architecture is a protocol for managing hardware
switch chips. It consists of a set of MII management registers and
commands to configure the switch, and an ethernet header format to
signal which of the ports of the switch a packet was received from
or is intended to be sent to.
The switches that this driver supports are typically embedded in
access points and routers, and a typical setup with a DSA switch
looks something like this:
+-----------+ +-----------+
| | RGMII | |
| +-------+ +------ 1000baseT MDI ("WAN")
| | | 6-port +------ 1000baseT MDI ("LAN1")
| CPU | | ethernet +------ 1000baseT MDI ("LAN2")
| |MIImgmt| switch +------ 1000baseT MDI ("LAN3")
| +-------+ w/5 PHYs +------ 1000baseT MDI ("LAN4")
| | | |
+-----------+ +-----------+
The switch driver presents each port on the switch as a separate
network interface to Linux, polls the switch to maintain software
link state of those ports, forwards MII management interface
accesses to those network interfaces (e.g. as done by ethtool) to
the switch, and exposes the switch's hardware statistics counters
via the appropriate Linux kernel interfaces.
This initial patch supports the MII management interface register
layout of the Marvell 88E6123, 88E6161 and 88E6165 switch chips, and
supports the "Ethertype DSA" packet tagging format.
(There is no officially registered ethertype for the Ethertype DSA
packet format, so we just grab a random one. The ethertype to use
is programmed into the switch, and the switch driver uses the value
of ETH_P_EDSA for this, so this define can be changed at any time in
the future if the one we chose is allocated to another protocol or
if Ethertype DSA gets its own officially registered ethertype, and
everything will continue to work.)
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Tested-by: Nicolas Pitre <nico@marvell.com>
Tested-by: Byron Bradley <byron.bbradley@gmail.com>
Tested-by: Tim Ellis <tim.ellis@mac.com>
Tested-by: Peter van Valderen <linux@ddcrew.com>
Tested-by: Dirk Teurlings <dirk@upexia.nl>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-07 13:44:02 +00:00
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config NET_DSA_TAG_EDSA
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2019-04-28 17:37:23 +00:00
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tristate "Tag driver for Marvell switches using EtherType DSA headers"
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2020-11-14 23:45:57 +00:00
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select NET_DSA_TAG_DSA_COMMON
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2019-04-28 17:37:23 +00:00
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help
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Say Y or M if you want to enable support for tagging frames for the
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Marvell switches which use EtherType DSA headers.
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net: Distributed Switch Architecture protocol support
Distributed Switch Architecture is a protocol for managing hardware
switch chips. It consists of a set of MII management registers and
commands to configure the switch, and an ethernet header format to
signal which of the ports of the switch a packet was received from
or is intended to be sent to.
The switches that this driver supports are typically embedded in
access points and routers, and a typical setup with a DSA switch
looks something like this:
+-----------+ +-----------+
| | RGMII | |
| +-------+ +------ 1000baseT MDI ("WAN")
| | | 6-port +------ 1000baseT MDI ("LAN1")
| CPU | | ethernet +------ 1000baseT MDI ("LAN2")
| |MIImgmt| switch +------ 1000baseT MDI ("LAN3")
| +-------+ w/5 PHYs +------ 1000baseT MDI ("LAN4")
| | | |
+-----------+ +-----------+
The switch driver presents each port on the switch as a separate
network interface to Linux, polls the switch to maintain software
link state of those ports, forwards MII management interface
accesses to those network interfaces (e.g. as done by ethtool) to
the switch, and exposes the switch's hardware statistics counters
via the appropriate Linux kernel interfaces.
This initial patch supports the MII management interface register
layout of the Marvell 88E6123, 88E6161 and 88E6165 switch chips, and
supports the "Ethertype DSA" packet tagging format.
(There is no officially registered ethertype for the Ethertype DSA
packet format, so we just grab a random one. The ethertype to use
is programmed into the switch, and the switch driver uses the value
of ETH_P_EDSA for this, so this define can be changed at any time in
the future if the one we chose is allocated to another protocol or
if Ethertype DSA gets its own officially registered ethertype, and
everything will continue to work.)
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Tested-by: Nicolas Pitre <nico@marvell.com>
Tested-by: Byron Bradley <byron.bbradley@gmail.com>
Tested-by: Tim Ellis <tim.ellis@mac.com>
Tested-by: Peter van Valderen <linux@ddcrew.com>
Tested-by: Dirk Teurlings <dirk@upexia.nl>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-07 13:44:02 +00:00
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2019-04-28 17:37:23 +00:00
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config NET_DSA_TAG_MTK
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tristate "Tag driver for Mediatek switches"
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help
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Say Y or M if you want to enable support for tagging frames for
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Mediatek switches.
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2017-05-31 20:19:06 +00:00
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config NET_DSA_TAG_KSZ
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2022-07-01 15:00:20 +00:00
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tristate "Tag driver for Microchip 8795/937x/9477/9893 families of switches"
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2019-04-28 17:37:23 +00:00
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help
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Say Y if you want to enable support for tagging frames for the
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2022-07-01 15:00:20 +00:00
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Microchip 8795/937x/9477/9893 families of switches.
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2018-12-15 00:58:04 +00:00
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2019-11-14 15:03:29 +00:00
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config NET_DSA_TAG_OCELOT
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2021-01-29 01:00:08 +00:00
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tristate "Tag driver for Ocelot family of switches, using NPI port"
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2019-11-14 15:03:29 +00:00
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select PACKING
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help
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2021-01-29 01:00:08 +00:00
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Say Y or M if you want to enable NPI tagging for the Ocelot switches
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(VSC7511, VSC7512, VSC7513, VSC7514, VSC9953, VSC9959). In this mode,
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the frames over the Ethernet CPU port are prepended with a
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hardware-defined injection/extraction frame header. Flow control
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(PAUSE frames) over the CPU port is not supported when operating in
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this mode.
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config NET_DSA_TAG_OCELOT_8021Q
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tristate "Tag driver for Ocelot family of switches, using VLAN"
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help
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Say Y or M if you want to enable support for tagging frames with a
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custom VLAN-based header. Frames that require timestamping, such as
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PTP, are not delivered over Ethernet but over register-based MMIO.
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Flow control over the CPU port is functional in this mode. When using
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this mode, less TCAM resources (VCAP IS1, IS2, ES0) are available for
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use with tc-flower.
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2019-11-14 15:03:29 +00:00
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2019-04-28 17:37:23 +00:00
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config NET_DSA_TAG_QCA
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tristate "Tag driver for Qualcomm Atheros QCA8K switches"
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help
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Say Y or M if you want to enable support for tagging frames for
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the Qualcomm Atheros QCA8K switches.
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2012-11-26 09:16:10 +00:00
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2021-10-18 09:37:58 +00:00
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config NET_DSA_TAG_RTL4_A
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tristate "Tag driver for Realtek 4 byte protocol A tags"
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help
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Say Y or M if you want to enable support for tagging frames for the
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Realtek switches with 4 byte protocol A tags, sich as found in
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the Realtek RTL8366RB.
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2021-10-18 09:38:00 +00:00
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config NET_DSA_TAG_RTL8_4
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tristate "Tag driver for Realtek 8 byte protocol 4 tags"
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help
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Say Y or M if you want to enable support for tagging frames for Realtek
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switches with 8 byte protocol 4 tags, such as the Realtek RTL8365MB-VC.
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2022-06-24 14:39:48 +00:00
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config NET_DSA_TAG_RZN1_A5PSW
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tristate "Tag driver for Renesas RZ/N1 A5PSW switch"
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help
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Say Y or M if you want to enable support for tagging frames for
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Renesas RZ/N1 embedded switch that uses an 8 byte tag located after
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destination MAC address.
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2019-04-28 17:37:23 +00:00
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config NET_DSA_TAG_LAN9303
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tristate "Tag driver for SMSC/Microchip LAN9303 family of switches"
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help
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Say Y or M if you want to enable support for tagging frames for the
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SMSC/Microchip LAN9303 family of switches.
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2016-09-15 14:26:40 +00:00
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2019-05-05 10:19:27 +00:00
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config NET_DSA_TAG_SJA1105
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tristate "Tag driver for NXP SJA1105 switches"
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2019-06-11 18:47:45 +00:00
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select PACKING
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2019-05-05 10:19:27 +00:00
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help
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Say Y or M if you want to enable support for tagging frames with the
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NXP SJA1105 switch family. Both the native tagging protocol (which
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is only for link-local traffic) as well as non-native tagging (based
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on a custom 802.1Q VLAN header) are available.
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2017-05-16 20:40:07 +00:00
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config NET_DSA_TAG_TRAILER
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2019-04-28 17:37:23 +00:00
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tristate "Tag driver for switches using a trailer tag"
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help
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Say Y or M if you want to enable support for tagging frames at
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with a trailed. e.g. Marvell 88E6060.
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2017-04-18 08:48:24 +00:00
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2021-01-14 19:57:32 +00:00
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config NET_DSA_TAG_XRS700X
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tristate "Tag driver for XRS700x switches"
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help
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Say Y or M if you want to enable support for tagging frames for
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Arrow SpeedChips XRS700x switches that use a single byte tag trailer.
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2012-11-26 09:16:10 +00:00
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endif
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