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108 lines
2.1 KiB
C
108 lines
2.1 KiB
C
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#ifndef __ASM_SH_ATOMIC_LLSC_H
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#define __ASM_SH_ATOMIC_LLSC_H
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/*
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* To get proper branch prediction for the main line, we must branch
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* forward to code at the end of this object's .text section, then
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* branch back to restart the operation.
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*/
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static inline void atomic_add(int i, atomic_t *v)
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{
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unsigned long tmp;
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__asm__ __volatile__ (
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"1: movli.l @%2, %0 ! atomic_add \n"
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" add %1, %0 \n"
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" movco.l %0, @%2 \n"
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" bf 1b \n"
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: "=&z" (tmp)
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: "r" (i), "r" (&v->counter)
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: "t");
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}
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static inline void atomic_sub(int i, atomic_t *v)
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{
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unsigned long tmp;
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__asm__ __volatile__ (
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"1: movli.l @%2, %0 ! atomic_sub \n"
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" sub %1, %0 \n"
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" movco.l %0, @%2 \n"
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" bf 1b \n"
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: "=&z" (tmp)
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: "r" (i), "r" (&v->counter)
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: "t");
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}
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/*
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* SH-4A note:
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*
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* We basically get atomic_xxx_return() for free compared with
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* atomic_xxx(). movli.l/movco.l require r0 due to the instruction
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* encoding, so the retval is automatically set without having to
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* do any special work.
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*/
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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unsigned long temp;
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__asm__ __volatile__ (
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"1: movli.l @%2, %0 ! atomic_add_return \n"
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" add %1, %0 \n"
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" movco.l %0, @%2 \n"
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" bf 1b \n"
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" synco \n"
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: "=&z" (temp)
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: "r" (i), "r" (&v->counter)
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: "t");
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return temp;
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}
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static inline int atomic_sub_return(int i, atomic_t *v)
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{
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unsigned long temp;
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__asm__ __volatile__ (
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"1: movli.l @%2, %0 ! atomic_sub_return \n"
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" sub %1, %0 \n"
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" movco.l %0, @%2 \n"
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" bf 1b \n"
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" synco \n"
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: "=&z" (temp)
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: "r" (i), "r" (&v->counter)
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: "t");
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return temp;
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}
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static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
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{
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unsigned long tmp;
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__asm__ __volatile__ (
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"1: movli.l @%2, %0 ! atomic_clear_mask \n"
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" and %1, %0 \n"
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" movco.l %0, @%2 \n"
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" bf 1b \n"
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: "=&z" (tmp)
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: "r" (~mask), "r" (&v->counter)
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: "t");
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}
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static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
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{
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unsigned long tmp;
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__asm__ __volatile__ (
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"1: movli.l @%2, %0 ! atomic_set_mask \n"
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" or %1, %0 \n"
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" movco.l %0, @%2 \n"
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" bf 1b \n"
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: "=&z" (tmp)
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: "r" (mask), "r" (&v->counter)
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: "t");
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}
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#endif /* __ASM_SH_ATOMIC_LLSC_H */
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