2015-08-24 08:13:14 +00:00
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#dmaengine debug flags
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2014-07-14 20:47:26 +00:00
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subdir-ccflags-$(CONFIG_DMADEVICES_DEBUG) := -DDEBUG
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subdir-ccflags-$(CONFIG_DMADEVICES_VDEBUG) += -DVERBOSE_DEBUG
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2010-02-09 21:34:54 +00:00
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2015-08-24 08:13:14 +00:00
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#core
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2006-05-24 00:50:37 +00:00
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obj-$(CONFIG_DMA_ENGINE) += dmaengine.o
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2012-04-13 11:07:23 +00:00
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obj-$(CONFIG_DMA_VIRTUAL_CHANNELS) += virt-dma.o
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2013-04-09 11:05:43 +00:00
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obj-$(CONFIG_DMA_ACPI) += acpi-dma.o
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2013-02-12 17:15:02 +00:00
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obj-$(CONFIG_DMA_OF) += of-dma.o
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2015-08-24 08:13:14 +00:00
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#dmatest
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2008-07-08 18:58:45 +00:00
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obj-$(CONFIG_DMATEST) += dmatest.o
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2015-08-24 08:13:14 +00:00
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#devices
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obj-$(CONFIG_AMBA_PL08X) += amba-pl08x.o
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obj-$(CONFIG_AMCC_PPC440SPE_ADMA) += ppc4xx/
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2009-07-03 17:24:33 +00:00
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obj-$(CONFIG_AT_HDMAC) += at_hdmac.o
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2014-10-22 15:22:18 +00:00
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obj-$(CONFIG_AT_XDMAC) += at_xdmac.o
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2015-08-24 08:13:14 +00:00
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obj-$(CONFIG_AXI_DMAC) += dma-axi-dmac.o
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2009-11-19 18:49:17 +00:00
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obj-$(CONFIG_COH901318) += coh901318.o coh901318_lli.o
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2015-08-24 08:13:14 +00:00
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obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o
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obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o
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obj-$(CONFIG_DMA_JZ4780) += dma-jz4780.o
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obj-$(CONFIG_DMA_OMAP) += omap-dma.o
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obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o
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obj-$(CONFIG_DMA_SUN4I) += sun4i-dma.o
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obj-$(CONFIG_DMA_SUN6I) += sun6i-dma.o
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obj-$(CONFIG_DW_DMAC_CORE) += dw/
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obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o
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obj-$(CONFIG_FSL_DMA) += fsldma.o
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obj-$(CONFIG_FSL_EDMA) += fsl-edma.o
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obj-$(CONFIG_FSL_RAID) += fsl_raid.o
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obj-$(CONFIG_HSU_DMA) += hsu/
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obj-$(CONFIG_IMG_MDC_DMA) += img-mdc-dma.o
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2010-10-06 08:25:55 +00:00
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obj-$(CONFIG_IMX_DMA) += imx-dma.o
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2015-08-24 08:13:14 +00:00
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obj-$(CONFIG_IMX_SDMA) += imx-sdma.o
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2015-09-04 18:10:18 +00:00
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obj-$(CONFIG_IDMA64) += idma64.o
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2015-08-24 08:13:14 +00:00
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obj-$(CONFIG_INTEL_IOATDMA) += ioat/
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obj-$(CONFIG_INTEL_IOP_ADMA) += iop-adma.o
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obj-$(CONFIG_INTEL_MIC_X100_DMA) += mic_x100_dma.o
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obj-$(CONFIG_K3_DMA) += k3dma.o
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obj-$(CONFIG_LPC18XX_DMAMUX) += lpc18xx-dmamux.o
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obj-$(CONFIG_MMP_PDMA) += mmp_pdma.o
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obj-$(CONFIG_MMP_TDMA) += mmp_tdma.o
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obj-$(CONFIG_MOXART_DMA) += moxart-dma.o
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obj-$(CONFIG_MPC512X_DMA) += mpc512x_dma.o
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obj-$(CONFIG_MV_XOR) += mv_xor.o
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2011-02-26 16:47:42 +00:00
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obj-$(CONFIG_MXS_DMA) += mxs-dma.o
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2015-08-24 08:13:14 +00:00
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obj-$(CONFIG_MX3_IPU) += ipu/
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obj-$(CONFIG_NBPFAXI_DMA) += nbpfaxi.o
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obj-$(CONFIG_PCH_DMA) += pch_dma.o
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obj-$(CONFIG_PL330_DMA) += pl330.o
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obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/
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dmaengine: pxa: add pxa dmaengine driver
This is a new driver for pxa SoCs, which is also compatible with the former
mmp_pdma.
The rationale behind a new driver (as opposed to incremental patching) was :
- the new driver relies on virt-dma, which obsoletes all the internal
structures of mmp_pdma (sw_desc, hw_desc, ...), and by consequence all the
functions
- mmp_pdma allocates dma coherent descriptors containing not only hardware
descriptors but linked list information
The new driver only puts the dma hardware descriptors (ie. 4 u32) into the
dma pool allocated memory. This changes completely the way descriptors are
handled
- the architecture behind the interrupt/tasklet management was rewritten to be
more conforming to virt-dma
- the buffers alignment is handled differently
The former driver assumed that the DMA channel stopped between each
descriptor. The new one chains descriptors to let the channel running. This
is a necessary guarantee for real-time high bandwidth usecases such as video
capture on "old" architectures such as pxa.
- hot chaining / cold chaining / no chaining
Whenever possible, submitting a descriptor "hot chains" it to a running
channel. There is still no guarantee that the descriptor will be issued, as
the channel might be stopped just before the descriptor is submitted. Yet
this allows to submit several video buffers, and resubmit a buffer while
another is under handling.
As before, dma_async_issue_pending() is the only guarantee to have all the
buffers issued.
When an alignment issue is detected (ie. one address in a descriptor is not
a multiple of 8), if the already running channel is in "aligned mode", the
channel will stop, and restarted in "misaligned mode" to finished the issued
list.
- descriptors reusing
A submitted, issued and completed descriptor can be reused, ie resubmitted if
it was prepared with the proper flag (DMA_PREP_ACK). Only a channel
resources release will in this case release that buffer.
This allows a rolling ring of buffers to be reused, where there are several
thousands of hardware descriptors used (video buffer for example).
Additionally, a set of more casual features is introduced :
- debugging traces
- lockless way to know if a descriptor is terminated or not
The driver was tested on zylonite board (pxa3xx) and mioa701 (pxa27x),
with dmatest, pxa_camera and pxamci.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-05-25 21:29:20 +00:00
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obj-$(CONFIG_PXA_DMA) += pxa_dma.o
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2015-08-24 08:13:14 +00:00
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obj-$(CONFIG_QCOM_BAM_DMA) += qcom_bam_dma.o
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obj-$(CONFIG_RENESAS_DMA) += sh/
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2011-10-28 02:22:39 +00:00
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obj-$(CONFIG_SIRF_DMA) += sirf-dma.o
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2010-03-30 13:33:42 +00:00
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obj-$(CONFIG_STE_DMA40) += ste_dma40.o ste_dma40_ll.o
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2013-10-07 21:42:10 +00:00
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obj-$(CONFIG_S3C24XX_DMAC) += s3c24xx-dma.o
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2015-08-24 08:13:14 +00:00
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obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o
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obj-$(CONFIG_TEGRA20_APB_DMA) += tegra20-apb-dma.o
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obj-$(CONFIG_TIMB_DMA) += timb_dma.o
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2013-06-20 10:13:04 +00:00
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obj-$(CONFIG_TI_CPPI41) += cppi41.o
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2015-08-24 08:13:14 +00:00
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obj-$(CONFIG_TI_DMA_CROSSBAR) += ti-dma-crossbar.o
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obj-$(CONFIG_TI_EDMA) += edma.o
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2015-03-18 13:47:34 +00:00
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obj-$(CONFIG_XGENE_DMA) += xgene-dma.o
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2015-05-05 14:06:08 +00:00
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obj-$(CONFIG_ZX_DMA) += zx296702_dma.o
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2015-08-24 08:13:14 +00:00
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obj-y += xilinx/
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