Minki/linux
1
0
Fork 1
mirror of https://github.com/torvalds/linux.git synced 2024-11-16 00:52:01 +00:00
Code Issues Packages Projects Releases Wiki Activity
6afd6fae1d
linux/arch/arm/kernel/head-nommu.S

93 lines
2.3 KiB
ArmAsm
Raw Normal View History

[ARM] nommu: start-up code This patch adds nommu version start-up code head-nommu.S. The common part of the start-up codes is moved to head-common.S. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-27 13:58:25 +00:00
/*
* linux/arch/arm/kernel/head-nommu.S
*
* Copyright (C) 1994-2002 Russell King
* Copyright (C) 2003-2006 Hyok S. Choi
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Common kernel startup code (non-paged MM)
*
*/
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/assembler.h>
#include <asm/mach-types.h>
#include <asm/procinfo.h>
#include <asm/ptrace.h>
[ARM] 3496/1: more constants for asm-offsets.h Patch from Uwe Zeisberger added the following constants: - MACHINFO_TYPE - MACHINFO_NAME - MACHINFO_PHYSIO - MACHINFO_PGOFFIO - PROCINFO_INITFUNC - PROCINFO_MMUFLAGS and removed their definition from head.S and head-nommu.S Signed-off-by: Uwe Zeisberger <Uwe_Zeisberger@digi.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-05-05 14:11:14 +00:00
#include <asm/asm-offsets.h>
[ARM] nommu: trivial fixups for head-nommu.S and the Makefile This patch fix compilation problem of start-up codes. (head-nommu.S, arch/arm/kernel/Makefile) Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-04-24 08:45:35 +00:00
#include <asm/thread_info.h>
[ARM] nommu: start-up code This patch adds nommu version start-up code head-nommu.S. The common part of the start-up codes is moved to head-common.S. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-27 13:58:25 +00:00
#include <asm/system.h>
/*
* Kernel startup entry point.
* ---------------------------
*
* This is normally called from the decompressor code. The requirements
* are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
* r1 = machine nr.
*
* See linux/arch/arm/tools/mach-types for the complete list of machine
* numbers for r1.
*
*/
__INIT
.type stext, %function
ENTRY(stext)
[ARM] Remove MODE_(SVC|IRQ|FIQ|USR) and DEFAULT_FIQ DEFAULT_FIQ was entirely unused. MODE_* are just redefinitions of *_MODE. Use *_MODE instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-06-25 11:01:48 +00:00
msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
[ARM] nommu: start-up code This patch adds nommu version start-up code head-nommu.S. The common part of the start-up codes is moved to head-common.S. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-27 13:58:25 +00:00
@ and irqs disabled
[ARM] nommu: manage the CP15 things All the current CP15 access codes in ARM arch can be categorized and conditioned by the defines as follows: Related operation Safe condition a. any CP15 access !CPU_CP15 b. alignment trap CPU_CP15_MMU c. D-cache(C-bit) CPU_CP15 d. I-cache CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 || CPU_ARM720 || CPU_ARM740 || CPU_XSCALE || CPU_XSC3 ) e. alternate vector CPU_CP15 && !CPU_ARM740 f. TTB CPU_CP15_MMU g. Domain CPU_CP15_MMU h. FSR/FAR CPU_CP15_MMU For example, alternate vector is supported if and only if "CPU_CP15 && !CPU_ARM740" is satisfied. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-09-26 08:36:37 +00:00
#ifndef CONFIG_CPU_CP15
ldr r9, =CONFIG_PROCESSOR_ID
#else
[ARM] nommu: start-up code This patch adds nommu version start-up code head-nommu.S. The common part of the start-up codes is moved to head-common.S. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-27 13:58:25 +00:00
mrc p15, 0, r9, c0, c0 @ get processor id
[ARM] nommu: manage the CP15 things All the current CP15 access codes in ARM arch can be categorized and conditioned by the defines as follows: Related operation Safe condition a. any CP15 access !CPU_CP15 b. alignment trap CPU_CP15_MMU c. D-cache(C-bit) CPU_CP15 d. I-cache CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 || CPU_ARM720 || CPU_ARM740 || CPU_XSCALE || CPU_XSC3 ) e. alternate vector CPU_CP15 && !CPU_ARM740 f. TTB CPU_CP15_MMU g. Domain CPU_CP15_MMU h. FSR/FAR CPU_CP15_MMU For example, alternate vector is supported if and only if "CPU_CP15 && !CPU_ARM740" is satisfied. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-09-26 08:36:37 +00:00
#endif
[ARM] nommu: start-up code This patch adds nommu version start-up code head-nommu.S. The common part of the start-up codes is moved to head-common.S. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-27 13:58:25 +00:00
bl __lookup_processor_type @ r5=procinfo r9=cpuid
movs r10, r5 @ invalid processor (r5=0)?
beq __error_p @ yes, error 'p'
bl __lookup_machine_type @ r5=machinfo
movs r8, r5 @ invalid machine (r5=0)?
beq __error_a @ yes, error 'a'
ldr r13, __switch_data @ address to jump to after
@ the initialization is done
adr lr, __after_proc_init @ return (PIC) address
add pc, r10, #PROCINFO_INITFUNC
/*
* Set the Control Register and Read the process ID.
*/
.type __after_proc_init, %function
__after_proc_init:
[ARM] nommu: manage the CP15 things All the current CP15 access codes in ARM arch can be categorized and conditioned by the defines as follows: Related operation Safe condition a. any CP15 access !CPU_CP15 b. alignment trap CPU_CP15_MMU c. D-cache(C-bit) CPU_CP15 d. I-cache CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 || CPU_ARM720 || CPU_ARM740 || CPU_XSCALE || CPU_XSC3 ) e. alternate vector CPU_CP15 && !CPU_ARM740 f. TTB CPU_CP15_MMU g. Domain CPU_CP15_MMU h. FSR/FAR CPU_CP15_MMU For example, alternate vector is supported if and only if "CPU_CP15 && !CPU_ARM740" is satisfied. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-09-26 08:36:37 +00:00
#ifdef CONFIG_CPU_CP15
[ARM] nommu: start-up code This patch adds nommu version start-up code head-nommu.S. The common part of the start-up codes is moved to head-common.S. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-27 13:58:25 +00:00
mrc p15, 0, r0, c1, c0, 0 @ read control reg
#ifdef CONFIG_ALIGNMENT_TRAP
orr r0, r0, #CR_A
#else
bic r0, r0, #CR_A
#endif
#ifdef CONFIG_CPU_DCACHE_DISABLE
bic r0, r0, #CR_C
#endif
#ifdef CONFIG_CPU_BPREDICT_DISABLE
bic r0, r0, #CR_Z
#endif
#ifdef CONFIG_CPU_ICACHE_DISABLE
bic r0, r0, #CR_I
[ARM] nommu: confirms the CR_V bit in nommu mode In nommu mode, the exception vector location depends on the platforms. Some of the implementations may have some special exception control forwarding method in their ROM/flash and for some of them has its own re-mapping mechanism by the h/w. This patch introduces a special configuration CONFIG_CPU_HIGH_VECTOR which turns on the CR_V bit in nommu mode. The CR_V bit is turned off by default. This feature depends on CP15 and does not supported by ARM740. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-09-28 12:46:34 +00:00
#endif
#ifdef CONFIG_CPU_HIGH_VECTOR
orr r0, r0, #CR_V
#else
bic r0, r0, #CR_V
[ARM] nommu: start-up code This patch adds nommu version start-up code head-nommu.S. The common part of the start-up codes is moved to head-common.S. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-27 13:58:25 +00:00
#endif
mcr p15, 0, r0, c1, c0, 0 @ write control reg
[ARM] nommu: manage the CP15 things All the current CP15 access codes in ARM arch can be categorized and conditioned by the defines as follows: Related operation Safe condition a. any CP15 access !CPU_CP15 b. alignment trap CPU_CP15_MMU c. D-cache(C-bit) CPU_CP15 d. I-cache CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 || CPU_ARM720 || CPU_ARM740 || CPU_XSCALE || CPU_XSC3 ) e. alternate vector CPU_CP15 && !CPU_ARM740 f. TTB CPU_CP15_MMU g. Domain CPU_CP15_MMU h. FSR/FAR CPU_CP15_MMU For example, alternate vector is supported if and only if "CPU_CP15 && !CPU_ARM740" is satisfied. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-09-26 08:36:37 +00:00
#endif /* CONFIG_CPU_CP15 */
[ARM] nommu: start-up code This patch adds nommu version start-up code head-nommu.S. The common part of the start-up codes is moved to head-common.S. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-27 13:58:25 +00:00
mov pc, r13 @ clear the BSS and jump
@ to start_kernel
[ARM] nommu: trivial fixups for head-nommu.S and the Makefile This patch fix compilation problem of start-up codes. (head-nommu.S, arch/arm/kernel/Makefile) Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-04-24 08:45:35 +00:00
.ltorg
[ARM] nommu: start-up code This patch adds nommu version start-up code head-nommu.S. The common part of the start-up codes is moved to head-common.S. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-27 13:58:25 +00:00
#include "head-common.S"
Reference in New Issue Copy Permalink