2019-05-31 08:09:25 +00:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2021-03-17 20:39:32 +00:00
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/*
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2009-05-14 06:05:58 +00:00
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* Copyright (C) 2008, Creative Technology Ltd. All Rights Reserved.
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*
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* @File cthardware.h
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*
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* @Brief
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* This file contains the definition of hardware access methord.
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*
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* @Author Liu Chun
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* @Date May 13 2008
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*/
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#ifndef CTHARDWARE_H
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#define CTHARDWARE_H
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#include <linux/types.h>
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#include <linux/pci.h>
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2014-09-29 09:03:23 +00:00
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#include <sound/core.h>
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2009-05-14 06:05:58 +00:00
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enum CHIPTYP {
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ATC20K1,
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ATC20K2,
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ATCNONE
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};
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2009-06-08 16:10:32 +00:00
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enum CTCARDS {
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/* 20k1 models */
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2022-05-21 04:45:15 +00:00
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CTSB046X,
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CT20K1_MODEL_FIRST = CTSB046X,
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2009-06-08 16:10:32 +00:00
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CTSB055X,
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CTSB073X,
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CTUAA,
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CT20K1_UNKNOWN,
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/* 20k2 models */
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CTSB0760,
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2009-06-22 05:36:52 +00:00
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CT20K2_MODEL_FIRST = CTSB0760,
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2009-06-08 16:10:32 +00:00
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CTHENDRIX,
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CTSB0880,
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2011-06-11 08:02:06 +00:00
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CTSB1270,
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2009-06-22 05:36:52 +00:00
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CT20K2_UNKNOWN,
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2009-06-08 16:10:32 +00:00
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NUM_CTCARDS /* This should always be the last */
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};
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2009-05-14 06:05:58 +00:00
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/* Type of input source for ADC */
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enum ADCSRC{
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ADC_MICIN,
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ADC_LINEIN,
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ADC_VIDEO,
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ADC_AUX,
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ADC_NONE /* Switch to digital input */
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};
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struct card_conf {
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/* device virtual mem page table page physical addr
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* (supporting one page table page now) */
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unsigned long vm_pgt_phys;
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unsigned int rsr; /* reference sample rate in Hzs*/
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unsigned int msr; /* master sample rate in rsrs */
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};
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2011-06-11 09:41:13 +00:00
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struct capabilities {
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unsigned int digit_io_switch:1;
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unsigned int dedicated_mic:1;
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unsigned int output_switch:1;
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unsigned int mic_source_switch:1;
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};
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2009-05-14 06:05:58 +00:00
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struct hw {
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int (*card_init)(struct hw *hw, struct card_conf *info);
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int (*card_stop)(struct hw *hw);
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int (*pll_init)(struct hw *hw, unsigned int rsr);
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2012-08-14 16:12:04 +00:00
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#ifdef CONFIG_PM_SLEEP
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2012-07-02 13:20:37 +00:00
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int (*suspend)(struct hw *hw);
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2009-06-22 12:52:34 +00:00
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int (*resume)(struct hw *hw, struct card_conf *info);
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#endif
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2009-05-14 06:05:58 +00:00
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int (*is_adc_source_selected)(struct hw *hw, enum ADCSRC source);
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int (*select_adc_source)(struct hw *hw, enum ADCSRC source);
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2011-06-11 09:41:13 +00:00
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struct capabilities (*capabilities)(struct hw *hw);
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2011-06-11 08:02:06 +00:00
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int (*output_switch_get)(struct hw *hw);
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int (*output_switch_put)(struct hw *hw, int position);
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int (*mic_source_switch_get)(struct hw *hw);
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int (*mic_source_switch_put)(struct hw *hw, int position);
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2009-05-14 06:05:58 +00:00
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/* SRC operations */
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int (*src_rsc_get_ctrl_blk)(void **rblk);
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int (*src_rsc_put_ctrl_blk)(void *blk);
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int (*src_set_state)(void *blk, unsigned int state);
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int (*src_set_bm)(void *blk, unsigned int bm);
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int (*src_set_rsr)(void *blk, unsigned int rsr);
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int (*src_set_sf)(void *blk, unsigned int sf);
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int (*src_set_wr)(void *blk, unsigned int wr);
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int (*src_set_pm)(void *blk, unsigned int pm);
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int (*src_set_rom)(void *blk, unsigned int rom);
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int (*src_set_vo)(void *blk, unsigned int vo);
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int (*src_set_st)(void *blk, unsigned int st);
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int (*src_set_ie)(void *blk, unsigned int ie);
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int (*src_set_ilsz)(void *blk, unsigned int ilsz);
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int (*src_set_bp)(void *blk, unsigned int bp);
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int (*src_set_cisz)(void *blk, unsigned int cisz);
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int (*src_set_ca)(void *blk, unsigned int ca);
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int (*src_set_sa)(void *blk, unsigned int sa);
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int (*src_set_la)(void *blk, unsigned int la);
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int (*src_set_pitch)(void *blk, unsigned int pitch);
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int (*src_set_clear_zbufs)(void *blk, unsigned int clear);
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int (*src_set_dirty)(void *blk, unsigned int flags);
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int (*src_set_dirty_all)(void *blk);
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int (*src_commit_write)(struct hw *hw, unsigned int idx, void *blk);
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int (*src_get_ca)(struct hw *hw, unsigned int idx, void *blk);
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unsigned int (*src_get_dirty)(void *blk);
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unsigned int (*src_dirty_conj_mask)(void);
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int (*src_mgr_get_ctrl_blk)(void **rblk);
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int (*src_mgr_put_ctrl_blk)(void *blk);
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/* syncly enable src @idx */
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int (*src_mgr_enbs_src)(void *blk, unsigned int idx);
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/* enable src @idx */
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int (*src_mgr_enb_src)(void *blk, unsigned int idx);
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/* disable src @idx */
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int (*src_mgr_dsb_src)(void *blk, unsigned int idx);
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int (*src_mgr_commit_write)(struct hw *hw, void *blk);
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/* SRC Input Mapper operations */
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int (*srcimp_mgr_get_ctrl_blk)(void **rblk);
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int (*srcimp_mgr_put_ctrl_blk)(void *blk);
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int (*srcimp_mgr_set_imaparc)(void *blk, unsigned int slot);
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int (*srcimp_mgr_set_imapuser)(void *blk, unsigned int user);
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int (*srcimp_mgr_set_imapnxt)(void *blk, unsigned int next);
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int (*srcimp_mgr_set_imapaddr)(void *blk, unsigned int addr);
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int (*srcimp_mgr_commit_write)(struct hw *hw, void *blk);
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/* AMIXER operations */
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int (*amixer_rsc_get_ctrl_blk)(void **rblk);
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int (*amixer_rsc_put_ctrl_blk)(void *blk);
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int (*amixer_mgr_get_ctrl_blk)(void **rblk);
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int (*amixer_mgr_put_ctrl_blk)(void *blk);
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int (*amixer_set_mode)(void *blk, unsigned int mode);
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int (*amixer_set_iv)(void *blk, unsigned int iv);
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int (*amixer_set_x)(void *blk, unsigned int x);
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int (*amixer_set_y)(void *blk, unsigned int y);
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int (*amixer_set_sadr)(void *blk, unsigned int sadr);
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int (*amixer_set_se)(void *blk, unsigned int se);
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int (*amixer_set_dirty)(void *blk, unsigned int flags);
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int (*amixer_set_dirty_all)(void *blk);
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int (*amixer_commit_write)(struct hw *hw, unsigned int idx, void *blk);
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int (*amixer_get_y)(void *blk);
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unsigned int (*amixer_get_dirty)(void *blk);
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/* DAIO operations */
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int (*dai_get_ctrl_blk)(void **rblk);
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int (*dai_put_ctrl_blk)(void *blk);
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int (*dai_srt_set_srco)(void *blk, unsigned int src);
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int (*dai_srt_set_srcm)(void *blk, unsigned int src);
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int (*dai_srt_set_rsr)(void *blk, unsigned int rsr);
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int (*dai_srt_set_drat)(void *blk, unsigned int drat);
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int (*dai_srt_set_ec)(void *blk, unsigned int ec);
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int (*dai_srt_set_et)(void *blk, unsigned int et);
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int (*dai_commit_write)(struct hw *hw, unsigned int idx, void *blk);
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int (*dao_get_ctrl_blk)(void **rblk);
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int (*dao_put_ctrl_blk)(void *blk);
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int (*dao_set_spos)(void *blk, unsigned int spos);
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int (*dao_commit_write)(struct hw *hw, unsigned int idx, void *blk);
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int (*dao_get_spos)(void *blk, unsigned int *spos);
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int (*daio_mgr_get_ctrl_blk)(struct hw *hw, void **rblk);
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int (*daio_mgr_put_ctrl_blk)(void *blk);
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int (*daio_mgr_enb_dai)(void *blk, unsigned int idx);
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int (*daio_mgr_dsb_dai)(void *blk, unsigned int idx);
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int (*daio_mgr_enb_dao)(void *blk, unsigned int idx);
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int (*daio_mgr_dsb_dao)(void *blk, unsigned int idx);
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int (*daio_mgr_dao_init)(void *blk, unsigned int idx,
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unsigned int conf);
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int (*daio_mgr_set_imaparc)(void *blk, unsigned int slot);
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int (*daio_mgr_set_imapnxt)(void *blk, unsigned int next);
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int (*daio_mgr_set_imapaddr)(void *blk, unsigned int addr);
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int (*daio_mgr_commit_write)(struct hw *hw, void *blk);
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2009-06-05 14:11:07 +00:00
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int (*set_timer_irq)(struct hw *hw, int enable);
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int (*set_timer_tick)(struct hw *hw, unsigned int tick);
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2009-06-08 08:21:07 +00:00
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unsigned int (*get_wc)(struct hw *hw);
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2009-06-05 14:11:07 +00:00
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void (*irq_callback)(void *data, unsigned int bit);
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void *irq_callback_data;
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2009-05-14 06:05:58 +00:00
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struct pci_dev *pci; /* the pci kernel structure of this card */
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2014-09-29 09:03:23 +00:00
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struct snd_card *card; /* pointer to this card */
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2009-05-14 06:05:58 +00:00
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int irq;
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unsigned long io_base;
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2014-09-23 11:00:24 +00:00
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void __iomem *mem_base;
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2009-06-08 16:10:32 +00:00
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enum CHIPTYP chip_type;
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enum CTCARDS model;
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2009-05-14 06:05:58 +00:00
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};
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2009-06-08 16:10:32 +00:00
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int create_hw_obj(struct pci_dev *pci, enum CHIPTYP chip_type,
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enum CTCARDS model, struct hw **rhw);
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2009-05-14 06:05:58 +00:00
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int destroy_hw_obj(struct hw *hw);
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unsigned int get_field(unsigned int data, unsigned int field);
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void set_field(unsigned int *data, unsigned int field, unsigned int value);
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2009-06-05 14:11:07 +00:00
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/* IRQ bits */
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#define PLL_INT (1 << 10) /* PLL input-clock out-of-range */
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#define FI_INT (1 << 9) /* forced interrupt */
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#define IT_INT (1 << 8) /* timer interrupt */
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#define PCI_INT (1 << 7) /* PCI bus error pending */
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#define URT_INT (1 << 6) /* UART Tx/Rx */
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#define GPI_INT (1 << 5) /* GPI pin */
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#define MIX_INT (1 << 4) /* mixer parameter segment FIFO channels */
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#define DAI_INT (1 << 3) /* DAI (SR-tracker or SPDIF-receiver) */
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#define TP_INT (1 << 2) /* transport priority queue */
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#define DSP_INT (1 << 1) /* DSP */
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#define SRC_INT (1 << 0) /* SRC channels */
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2009-05-14 06:05:58 +00:00
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#endif /* CTHARDWARE_H */
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