2009-11-29 15:15:25 +00:00
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/****************************************************************************
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* Driver for Solarflare Solarstorm network controllers and boards
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2011-02-25 00:01:34 +00:00
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* Copyright 2008-2010 Solarflare Communications Inc.
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2009-11-29 15:15:25 +00:00
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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#ifndef EFX_MCDI_H
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#define EFX_MCDI_H
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/**
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* enum efx_mcdi_state
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* @MCDI_STATE_QUIESCENT: No pending MCDI requests. If the caller holds the
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* mcdi_lock then they are able to move to MCDI_STATE_RUNNING
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* @MCDI_STATE_RUNNING: There is an MCDI request pending. Only the thread that
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* moved into this state is allowed to move out of it.
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* @MCDI_STATE_COMPLETED: An MCDI request has completed, but the owning thread
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* has not yet consumed the result. For all other threads, equivalent to
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* MCDI_STATE_RUNNING.
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*/
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enum efx_mcdi_state {
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MCDI_STATE_QUIESCENT,
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MCDI_STATE_RUNNING,
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MCDI_STATE_COMPLETED,
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};
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enum efx_mcdi_mode {
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MCDI_MODE_POLL,
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MCDI_MODE_EVENTS,
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};
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/**
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* struct efx_mcdi_iface
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* @state: Interface state. Waited for by mcdi_wq.
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* @wq: Wait queue for threads waiting for state != STATE_RUNNING
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* @iface_lock: Protects @credits, @seqno, @resprc, @resplen
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* @mode: Poll for mcdi completion, or wait for an mcdi_event.
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* Serialised by @lock
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* @seqno: The next sequence number to use for mcdi requests.
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* Serialised by @lock
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* @credits: Number of spurious MCDI completion events allowed before we
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* trigger a fatal error. Protected by @lock
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* @resprc: Returned MCDI completion
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* @resplen: Returned payload length
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*/
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struct efx_mcdi_iface {
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atomic_t state;
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wait_queue_head_t wq;
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spinlock_t iface_lock;
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enum efx_mcdi_mode mode;
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unsigned int credits;
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unsigned int seqno;
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unsigned int resprc;
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size_t resplen;
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};
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2012-01-06 20:25:39 +00:00
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struct efx_mcdi_mon {
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struct efx_buffer dma_buf;
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struct mutex update_lock;
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unsigned long last_update;
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struct device *device;
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struct efx_mcdi_mon_attribute *attrs;
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unsigned int n_attrs;
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};
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2009-11-29 15:15:25 +00:00
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extern void efx_mcdi_init(struct efx_nic *efx);
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2012-09-14 16:31:41 +00:00
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extern int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
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const efx_dword_t *inbuf, size_t inlen,
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efx_dword_t *outbuf, size_t outlen,
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2009-11-29 15:15:25 +00:00
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size_t *outlen_actual);
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2012-07-16 16:40:47 +00:00
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extern void efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
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2012-09-14 16:31:41 +00:00
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const efx_dword_t *inbuf, size_t inlen);
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2012-07-16 16:40:47 +00:00
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extern int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
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2012-09-14 16:31:41 +00:00
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efx_dword_t *outbuf, size_t outlen,
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2012-07-16 16:40:47 +00:00
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size_t *outlen_actual);
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2012-09-14 16:31:41 +00:00
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2009-11-29 15:15:25 +00:00
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extern int efx_mcdi_poll_reboot(struct efx_nic *efx);
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extern void efx_mcdi_mode_poll(struct efx_nic *efx);
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extern void efx_mcdi_mode_event(struct efx_nic *efx);
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extern void efx_mcdi_process_event(struct efx_channel *channel,
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efx_qword_t *event);
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2012-01-06 20:25:39 +00:00
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extern void efx_mcdi_sensor_event(struct efx_nic *efx, efx_qword_t *ev);
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2009-11-29 15:15:25 +00:00
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2012-09-14 16:31:41 +00:00
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/* We expect that 16- and 32-bit fields in MCDI requests and responses
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2012-10-10 22:20:17 +00:00
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* are appropriately aligned, but 64-bit fields are only
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* 32-bit-aligned. Also, on Siena we must copy to the MC shared
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* memory strictly 32 bits at a time, so add any necessary padding.
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2012-09-14 16:31:41 +00:00
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*/
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2012-09-14 16:30:10 +00:00
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#define MCDI_DECLARE_BUF(_name, _len) \
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2012-09-14 16:31:41 +00:00
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efx_dword_t _name[DIV_ROUND_UP(_len, 4)]
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2012-09-14 16:30:58 +00:00
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#define _MCDI_PTR(_buf, _offset) \
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((u8 *)(_buf) + (_offset))
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2012-09-14 16:30:44 +00:00
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#define MCDI_PTR(_buf, _field) \
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2012-09-14 16:30:58 +00:00
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_MCDI_PTR(_buf, MC_CMD_ ## _field ## _OFST)
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2012-09-14 16:31:41 +00:00
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#define _MCDI_CHECK_ALIGN(_ofst, _align) \
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((_ofst) + BUILD_BUG_ON_ZERO((_ofst) & (_align - 1)))
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2012-09-14 16:30:44 +00:00
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#define _MCDI_DWORD(_buf, _field) \
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2012-09-14 16:31:41 +00:00
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((_buf) + (_MCDI_CHECK_ALIGN(MC_CMD_ ## _field ## _OFST, 4) >> 2))
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2012-09-14 16:30:10 +00:00
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2012-09-14 16:30:44 +00:00
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#define MCDI_SET_DWORD(_buf, _field, _value) \
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EFX_POPULATE_DWORD_1(*_MCDI_DWORD(_buf, _field), EFX_DWORD_0, _value)
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#define MCDI_DWORD(_buf, _field) \
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EFX_DWORD_FIELD(*_MCDI_DWORD(_buf, _field), EFX_DWORD_0)
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2012-10-10 22:20:17 +00:00
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#define MCDI_SET_QWORD(_buf, _field, _value) \
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do { \
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EFX_POPULATE_DWORD_1(_MCDI_DWORD(_buf, _field)[0], \
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EFX_DWORD_0, (u32)(_value)); \
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EFX_POPULATE_DWORD_1(_MCDI_DWORD(_buf, _field)[1], \
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EFX_DWORD_0, (u64)(_value) >> 32); \
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} while (0)
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2012-09-14 16:30:44 +00:00
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#define MCDI_QWORD(_buf, _field) \
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(EFX_DWORD_FIELD(_MCDI_DWORD(_buf, _field)[0], EFX_DWORD_0) | \
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(u64)EFX_DWORD_FIELD(_MCDI_DWORD(_buf, _field)[1], EFX_DWORD_0) << 32)
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2012-09-14 16:30:58 +00:00
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#define MCDI_FIELD(_ptr, _type, _field) \
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EFX_EXTRACT_DWORD( \
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*(efx_dword_t *) \
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_MCDI_PTR(_ptr, MC_CMD_ ## _type ## _ ## _field ## _OFST & ~3),\
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MC_CMD_ ## _type ## _ ## _field ## _LBN & 0x1f, \
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(MC_CMD_ ## _type ## _ ## _field ## _LBN & 0x1f) + \
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MC_CMD_ ## _type ## _ ## _field ## _WIDTH - 1)
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2012-09-14 16:30:44 +00:00
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2012-09-14 16:31:41 +00:00
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#define _MCDI_ARRAY_PTR(_buf, _field, _index, _align) \
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(_MCDI_PTR(_buf, _MCDI_CHECK_ALIGN(MC_CMD_ ## _field ## _OFST, _align))\
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+ (_index) * _MCDI_CHECK_ALIGN(MC_CMD_ ## _field ## _LEN, _align))
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2012-09-14 16:30:58 +00:00
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#define MCDI_DECLARE_STRUCT_PTR(_name) \
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2012-09-14 16:31:41 +00:00
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efx_dword_t *_name
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#define MCDI_ARRAY_STRUCT_PTR(_buf, _field, _index) \
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((efx_dword_t *)_MCDI_ARRAY_PTR(_buf, _field, _index, 4))
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2012-09-14 16:30:58 +00:00
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#define MCDI_VAR_ARRAY_LEN(_len, _field) \
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min_t(size_t, MC_CMD_ ## _field ## _MAXNUM, \
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((_len) - MC_CMD_ ## _field ## _OFST) / MC_CMD_ ## _field ## _LEN)
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#define MCDI_ARRAY_WORD(_buf, _field, _index) \
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(BUILD_BUG_ON_ZERO(MC_CMD_ ## _field ## _LEN != 2) + \
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le16_to_cpu(*(__force const __le16 *) \
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2012-09-14 16:31:41 +00:00
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_MCDI_ARRAY_PTR(_buf, _field, _index, 2)))
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2012-09-14 16:30:58 +00:00
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#define _MCDI_ARRAY_DWORD(_buf, _field, _index) \
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(BUILD_BUG_ON_ZERO(MC_CMD_ ## _field ## _LEN != 4) + \
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2012-09-14 16:31:41 +00:00
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(efx_dword_t *)_MCDI_ARRAY_PTR(_buf, _field, _index, 4))
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2012-09-14 16:30:58 +00:00
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#define MCDI_SET_ARRAY_DWORD(_buf, _field, _index, _value) \
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EFX_SET_DWORD_FIELD(*_MCDI_ARRAY_DWORD(_buf, _field, _index), \
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EFX_DWORD_0, _value)
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#define MCDI_ARRAY_DWORD(_buf, _field, _index) \
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EFX_DWORD_FIELD(*_MCDI_ARRAY_DWORD(_buf, _field, _index), EFX_DWORD_0)
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2012-10-10 22:20:17 +00:00
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#define _MCDI_ARRAY_QWORD(_buf, _field, _index) \
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(BUILD_BUG_ON_ZERO(MC_CMD_ ## _field ## _LEN != 8) + \
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(efx_dword_t *)_MCDI_ARRAY_PTR(_buf, _field, _index, 4))
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#define MCDI_SET_ARRAY_QWORD(_buf, _field, _index, _value) \
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do { \
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EFX_SET_DWORD_FIELD(_MCDI_ARRAY_QWORD(_buf, _field, _index)[0],\
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EFX_DWORD_0, (u32)(_value)); \
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EFX_SET_DWORD_FIELD(_MCDI_ARRAY_QWORD(_buf, _field, _index)[1],\
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EFX_DWORD_0, (u64)(_value) >> 32); \
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} while (0)
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2012-01-06 20:25:39 +00:00
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#define MCDI_ARRAY_FIELD(_buf, _field1, _type, _index, _field2) \
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2012-09-14 16:30:58 +00:00
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MCDI_FIELD(MCDI_ARRAY_STRUCT_PTR(_buf, _field1, _index), \
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_type ## _TYPEDEF, _field2)
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2009-11-29 15:15:25 +00:00
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2012-09-14 16:30:44 +00:00
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#define MCDI_EVENT_FIELD(_ev, _field) \
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EFX_QWORD_FIELD(_ev, MCDI_EVENT_ ## _field)
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2011-02-24 23:57:47 +00:00
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extern void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len);
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2009-11-29 15:15:25 +00:00
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extern int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
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bool *was_attached_out);
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extern int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
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2010-07-14 14:36:19 +00:00
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u16 *fw_subtype_list, u32 *capabilities);
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2009-11-29 15:15:25 +00:00
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extern int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart,
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u32 dest_evq);
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extern int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out);
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extern int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
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size_t *size_out, size_t *erase_size_out,
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bool *protected_out);
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extern int efx_mcdi_nvram_update_start(struct efx_nic *efx,
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unsigned int type);
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extern int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
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loff_t offset, u8 *buffer, size_t length);
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extern int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
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loff_t offset, const u8 *buffer,
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size_t length);
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2010-01-25 23:49:59 +00:00
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#define EFX_MCDI_NVRAM_LEN_MAX 128
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2009-11-29 15:15:25 +00:00
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extern int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
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loff_t offset, size_t length);
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extern int efx_mcdi_nvram_update_finish(struct efx_nic *efx,
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unsigned int type);
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2010-02-03 09:31:01 +00:00
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extern int efx_mcdi_nvram_test_all(struct efx_nic *efx);
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2009-11-29 15:15:25 +00:00
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extern int efx_mcdi_handle_assertion(struct efx_nic *efx);
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extern void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode);
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extern int efx_mcdi_wol_filter_set_magic(struct efx_nic *efx,
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const u8 *mac, int *id_out);
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extern int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out);
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extern int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id);
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extern int efx_mcdi_wol_filter_reset(struct efx_nic *efx);
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sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 00:48:07 +00:00
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extern int efx_mcdi_flush_rxqs(struct efx_nic *efx);
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2012-09-18 01:33:54 +00:00
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extern int efx_mcdi_port_probe(struct efx_nic *efx);
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extern void efx_mcdi_port_remove(struct efx_nic *efx);
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extern int efx_mcdi_port_reconfigure(struct efx_nic *efx);
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extern void efx_mcdi_process_link_change(struct efx_nic *efx, efx_qword_t *ev);
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sfc: Add SR-IOV back-end support for SFC9000 family
On the SFC9000 family, each port has 1024 Virtual Interfaces (VIs),
each with an RX queue, a TX queue, an event queue and a mailbox
register. These may be assigned to up to 127 SR-IOV virtual functions
per port, with up to 64 VIs per VF.
We allocate an extra channel (IRQ and event queue only) to receive
requests from VF drivers.
There is a per-port limit of 4 concurrent RX queue flushes, and queue
flushes may be initiated by the MC in response to a Function Level
Reset (FLR) of a VF. Therefore, when SR-IOV is in use, we submit all
flush requests via the MC.
The RSS indirection table is shared with VFs, so the number of RX
queues used in the PF is limited to the number of VIs per VF.
This is almost entirely the work of Steve Hodgson, formerly
shodgson@solarflare.com.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
2012-02-14 00:48:07 +00:00
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extern int efx_mcdi_set_mac(struct efx_nic *efx);
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2012-09-18 01:33:54 +00:00
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#define EFX_MC_STATS_GENERATION_INVALID ((__force __le64)(-1))
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extern void efx_mcdi_mac_start_stats(struct efx_nic *efx);
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extern void efx_mcdi_mac_stop_stats(struct efx_nic *efx);
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2011-09-02 23:15:00 +00:00
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extern bool efx_mcdi_mac_check_fault(struct efx_nic *efx);
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2012-09-18 01:33:52 +00:00
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extern enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason);
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extern int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method);
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2009-11-29 15:15:25 +00:00
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2012-01-06 20:25:39 +00:00
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#ifdef CONFIG_SFC_MCDI_MON
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extern int efx_mcdi_mon_probe(struct efx_nic *efx);
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extern void efx_mcdi_mon_remove(struct efx_nic *efx);
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#else
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static inline int efx_mcdi_mon_probe(struct efx_nic *efx) { return 0; }
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static inline void efx_mcdi_mon_remove(struct efx_nic *efx) {}
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#endif
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2009-11-29 15:15:25 +00:00
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#endif /* EFX_MCDI_H */
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