2012-06-13 17:01:28 +00:00
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/*
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* Generic definitions for Marvell Armada_370_XP SoCs
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*
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* Copyright (C) 2012 Marvell
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*
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* Lior Amsalem <alior@marvell.com>
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __MACH_ARMADA_370_XP_H
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#define __MACH_ARMADA_370_XP_H
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#define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000
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2013-04-08 22:52:11 +00:00
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#define ARMADA_370_XP_REGS_VIRT_BASE IOMEM(0xfec00000)
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2012-06-13 17:01:28 +00:00
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#define ARMADA_370_XP_REGS_SIZE SZ_1M
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2013-03-21 16:59:15 +00:00
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/* These defines can go away once mvebu-mbus has a DT binding */
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#define ARMADA_370_XP_MBUS_WINS_BASE (ARMADA_370_XP_REGS_PHYS_BASE + 0x20000)
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#define ARMADA_370_XP_MBUS_WINS_SIZE 0x100
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#define ARMADA_370_XP_SDRAM_WINS_BASE (ARMADA_370_XP_REGS_PHYS_BASE + 0x20180)
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#define ARMADA_370_XP_SDRAM_WINS_SIZE 0x20
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2012-08-02 08:19:12 +00:00
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#ifdef CONFIG_SMP
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#include <linux/cpumask.h>
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void armada_mpic_send_doorbell(const struct cpumask *mask, unsigned int irq);
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void armada_xp_mpic_smp_cpu_init(void);
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#endif
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2012-06-13 17:01:28 +00:00
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#endif /* __MACH_ARMADA_370_XP_H */
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